b50fd8c2b3
Register SPI controllers through device tree. We will wire up the clocks at a later stage. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
51 lines
1.5 KiB
Diff
51 lines
1.5 KiB
Diff
From ff759cc25db31bbb3469abb16a0306f110c4c7fa Mon Sep 17 00:00:00 2001
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From: Jonas Gorski <jonas.gorski@gmail.com>
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Date: Thu, 10 Sep 2015 14:52:32 +0200
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Subject: [PATCH 2/3] dt-bindings: spi: document bcm63xx HS SPI devicetree
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bindings
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Add documentation for the bindings of the high speed SPI controller found
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on newer bcm63xx SoCs.
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Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
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---
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.../devicetree/bindings/spi/spi-bcm63xx-hsspi.txt | 33 ++++++++++++++++++++++
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1 file changed, 33 insertions(+)
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create mode 100644 Documentation/devicetree/bindings/spi/spi-bcm63xx-hsspi.txt
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--- /dev/null
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+++ b/Documentation/devicetree/bindings/spi/spi-bcm63xx-hsspi.txt
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@@ -0,0 +1,33 @@
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+Binding for Broadcom BCM6328 High Speed SPI controller
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+
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+Required properties:
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+- compatible: must contain of "brcm,bcm6328-hsspi".
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+- reg: Base address and size of the controllers memory area.
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+- interrupts: Interrupt for the SPI block.
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+- clocks: phandles of the SPI clock and the PLL clock.
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+- clock-names: must be "hsspi", "pll".
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+- #address-cells: <1>, as required by generic SPI binding.
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+- #size-cells: <0>, also as required by generic SPI binding.
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+
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+Optional properties:
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+- num-cs: some controllers have less than 8 cs signals. Defaults to 8
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+ if absent.
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+
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+Child nodes as per the generic SPI binding.
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+
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+Example:
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+
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+ spi@10001000 {
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+ compatible = "brcm,bcm6328-hsspi";
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+ reg = <0x10001000 0x600>;
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+
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+ interrupts = <29>;
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+
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+ clocks = <&clkctl 9>, <&hsspi_pll>;
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+ clock-names = "hsspi", "pll";
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+
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+ num-cs = <2>;
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+
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ };
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