1246dce0b3
Patches created from tree: git@github.com:danielschwierzeck/u-boot-lantiq.git v2013.10..u-boot-lantiq-v2013.10-openwrt4 Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> SVN-Revision: 40482
68 lines
3.9 KiB
Diff
68 lines
3.9 KiB
Diff
From 6fa1c350fa19a054371eccef84e4885cfdd6a2d7 Mon Sep 17 00:00:00 2001
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From: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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Date: Mon, 19 Aug 2013 18:11:31 +0200
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Subject: MIPS: lantiq: easy80920: add support for NAND SPL
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Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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diff --git a/boards.cfg b/boards.cfg
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index f090726..394ede7 100644
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--- a/boards.cfg
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+++ b/boards.cfg
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@@ -509,6 +509,7 @@ Active mips mips32 incaip - incaip
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Active mips mips32 incaip - incaip incaip_100MHz incaip:CPU_CLOCK_RATE=100000000 Wolfgang Denk <wd@denx.de>
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Active mips mips32 incaip - incaip incaip_133MHz incaip:CPU_CLOCK_RATE=133000000 Wolfgang Denk <wd@denx.de>
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Active mips mips32 incaip - incaip incaip_150MHz incaip:CPU_CLOCK_RATE=150000000 Wolfgang Denk <wd@denx.de>
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+Active mips mips32 vrx200 lantiq easy80920 easy80920_nandspl easy80920:SYS_BOOT_NANDSPL Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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Active mips mips32 vrx200 lantiq easy80920 easy80920_nor easy80920:SYS_BOOT_NOR Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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Active mips mips32 vrx200 lantiq easy80920 easy80920_norspl easy80920:SYS_BOOT_NORSPL Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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Active mips mips32 vrx200 lantiq easy80920 easy80920_ram easy80920:SYS_BOOT_RAM Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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diff --git a/include/configs/easy80920.h b/include/configs/easy80920.h
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index ad69bc2..56ceedb 100644
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--- a/include/configs/easy80920.h
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+++ b/include/configs/easy80920.h
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@@ -31,6 +31,14 @@
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#define CONFIG_LTQ_SUPPORT_SPL_NOR_FLASH /* Build NOR flash SPL */
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+#define CONFIG_LTQ_SUPPORT_SPL_NAND_FLASH /* Build NAND flash SPL */
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+#define CONFIG_SYS_NAND_PAGE_COUNT 128
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+#define CONFIG_SYS_NAND_PAGE_SIZE 2048
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+#define CONFIG_SYS_NAND_OOBSIZE 64
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+#define CONFIG_SYS_NAND_BLOCK_SIZE (256 * 1024)
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+#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
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+#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x4000
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+
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#define CONFIG_LTQ_SPL_COMP_LZO
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#define CONFIG_LTQ_SPL_CONSOLE
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@@ -57,6 +65,11 @@
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_ENV_OFFSET (192 * 1024)
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#define CONFIG_ENV_SECT_SIZE (64 * 1024)
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+#elif defined(CONFIG_SYS_BOOT_NANDSPL)
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+#define CONFIG_ENV_IS_IN_NAND
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+#define CONFIG_ENV_OVERWRITE
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+#define CONFIG_ENV_OFFSET (256 * 1024)
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+#define CONFIG_ENV_SECT_SIZE (256 * 1024)
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#else
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#define CONFIG_ENV_IS_NOWHERE
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#endif
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@@ -84,9 +97,13 @@
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#define CONFIG_ENV_UPDATE_UBOOT_SF \
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"update-uboot-sf=run load-uboot-sfspl-lzo write-uboot-sf\0"
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+#define CONFIG_ENV_UPDATE_UBOOT_NAND \
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+ "update-uboot-nand=run load-uboot-nandspl-lzo write-uboot-nand\0"
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+
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#define CONFIG_EXTRA_ENV_SETTINGS \
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CONFIG_ENV_LANTIQ_DEFAULTS \
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CONFIG_ENV_UPDATE_UBOOT_NOR \
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- CONFIG_ENV_UPDATE_UBOOT_SF
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+ CONFIG_ENV_UPDATE_UBOOT_SF \
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+ CONFIG_ENV_UPDATE_UBOOT_NAND
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#endif /* __CONFIG_H */
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--
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1.8.3.2
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