04ad02d132
Compared to the "old" driver: - Each device must assign a pinctrl setting to the SPI node to allow the new SPI driver to configure the SPI pins. While here we are also using separate input and output settings so we are independent of whether the bootloader configures the pins correctly. - We use the new "compatible" strings to make the driver choose the correct number of chip-selects for each SoC. - The new driver starts counting the chip-selects at 1 (instead of 0, like the old one did). Thus we have to adjust the devices accordingly. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> SVN-Revision: 48293
150 lines
2.9 KiB
Text
150 lines
2.9 KiB
Text
/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "lantiq,xway", "lantiq,ase";
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cpus {
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cpu@0 {
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compatible = "mips,mips4Kc";
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};
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};
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biu@1F800000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "lantiq,biu", "simple-bus";
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reg = <0x1F800000 0x800000>;
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ranges = <0x0 0x1F800000 0x7FFFFF>;
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icu0: icu@80200 {
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#interrupt-cells = <1>;
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interrupt-controller;
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compatible = "lantiq,icu";
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reg = <0x80200 0x28
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0x80228 0x28
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0x80250 0x28
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0x80278 0x28
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0x802a0 0x28>;
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};
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watchdog@803F0 {
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compatible = "lantiq,wdt";
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reg = <0x803F0 0x10>;
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};
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};
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sram@1F000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "lantiq,sram", "simple-bus";
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reg = <0x1F000000 0x800000>;
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ranges = <0x0 0x1F000000 0x7FFFFF>;
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eiu0: eiu@101000 {
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#interrupt-cells = <1>;
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compatible = "lantiq,eiu-xway";
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reg = <0x101000 0x1000>;
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interrupt-parent = <&icu0>;
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interrupts = <29 30 31>;
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};
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pmu0: pmu@102000 {
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compatible = "lantiq,pmu-xway";
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reg = <0x102000 0x1000>;
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};
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cgu0: cgu@103000 {
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compatible = "lantiq,cgu-xway";
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reg = <0x103000 0x1000>;
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#clock-cells = <1>;
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};
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rcu0: rcu@203000 {
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compatible = "lantiq,rcu-xway";
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reg = <0x203000 0x1000>;
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};
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};
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fpi@10000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "lantiq,fpi", "simple-bus";
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ranges = <0x0 0x10000000 0xEEFFFFF>;
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reg = <0x10000000 0xEF00000>;
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spi@E100800 {
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compatible = "lantiq,ase-spi";
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reg = <0xE100800 0x100>;
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interrupt-parent = <&icu0>;
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interrupts = <24 25 26>;
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interrupt-names = "spi_rx", "spi_tx", "spi_err",
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"spi_frm";
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#address-cells = <1>;
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#size-cells = <1>;
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};
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gptu@E100A00 {
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compatible = "lantiq,gptu-xway";
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reg = <0xE100A00 0x100>;
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interrupt-parent = <&icu0>;
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interrupts = <97 98 99 100 101 102>;
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status = "disabled";
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};
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gpio: pinmux@E100B10 {
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compatible = "lantiq,ase-pinctrl";
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#gpio-cells = <2>;
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gpio-controller;
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reg = <0xE100B10 0xA0>;
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};
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serial@E100C00 {
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compatible = "lantiq,asc";
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reg = <0xE100C00 0x400>;
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interrupt-parent = <&icu0>;
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interrupts = <72 74 75>;
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};
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mei@E116000 {
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compatible = "lantiq,mei-xway";
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interrupt-parent = <&icu0>;
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interrupts = <63>;
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};
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ifxhcd@E101000 {
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compatible = "lantiq,ifxhcd-ase";
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reg = <0xE101000 0x1000
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0xE120000 0x3f000>;
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interrupt-parent = <&icu0>;
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interrupts = <39>;
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status = "disabled";
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};
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dma0: dma@E104100 {
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compatible = "lantiq,dma-xway";
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reg = <0xE104100 0x800>;
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};
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ebu0: ebu@E105300 {
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compatible = "lantiq,ebu-xway";
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reg = <0xE105300 0x100>;
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};
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ppe@E234000 {
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compatible = "lantiq,ppe-ase";
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interrupt-parent = <&icu0>;
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interrupts = <85>;
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};
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etop@E180000 {
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compatible = "lantiq,etop-xway";
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reg = <0xE180000 0x40000>;
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interrupt-parent = <&icu0>;
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interrupts = <105 109>;
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};
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};
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adsl {
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compatible = "lantiq,adsl-ase";
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};
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};
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