53c474abbd
This target aims to replace ar71xx mid-term. The big part that is still missing is making the MMIO/AHB wifi work using OF. NAND and mikrotik subtargets will follow. Signed-off-by: John Crispin <john@phrozen.org>
81 lines
1.3 KiB
Text
81 lines
1.3 KiB
Text
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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cpuintc: interrupt-controller {
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compatible = "qca,ar7100-cpu-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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ahb {
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compatible = "simple-bus";
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ranges;
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&cpuintc>;
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apb {
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compatible = "simple-bus";
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ranges;
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&miscintc>;
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miscintc: interrupt-controller@18060010 {
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compatible = "qca,ar7240-misc-intc";
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reg = <0x18060010 0x4>;
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interrupt-parent = <&cpuintc>;
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interrupts = <6>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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};
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eth0: eth@19000000 {
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status = "disabled";
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compatible = "qca,ath79-eth", "syscon";
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reg = <0x19000000 0x200>;
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interrupts = <4>;
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phy-mode = "mii";
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mdio0: mdio-bus {
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status = "disabled";
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regmap = <ð0>;
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clocks = <&pll ATH79_CLK_MDIO>;
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clock-names = "ref";
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};
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};
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eth1: eth@1a000000 {
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status = "disabled";
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compatible = "qca,ath79-eth", "syscon";
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reg = <0x1a000000 0x200>;
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interrupts = <5>;
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phy-mode = "mii";
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mdio1: mdio-bus {
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status = "disabled";
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regmap = <ð1>;
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clocks = <&pll ATH79_CLK_MDIO>;
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clock-names = "ref";
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};
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};
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};
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};
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