f997478655
Refresh patches. Remove upstreamed patches: - generic/190-1-5-e1000e-Fix-error-path-in-link-detection.patch - generic/190-3-5-e1000e-Fix-return-value-test.patch - generic/190-4-5-e1000e-Separate-signaling-for-link-check-link-up.patch - generic/190-5-5-e1000e-Avoid-receiver-overrun-interrupt-bursts.patch - ramips/0102-MIPS-ralink-Fix-MT7628-pinmux.patch - ramips/0103-MIPS-ralink-Fix-typo-in-mt7628-pinmux-function Update patches that no longer apply: - layerscape/815-spi-support-layerscape.patch - ramips/0099-pci-mt7620.patch Compile-tested on ar71xx, brcm2708/bcm2708, octeon and x86/64. Runtime-tested on ar71xx, brcm2708/bcm2708, octeon and x86/64. Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
43 lines
1.4 KiB
Diff
43 lines
1.4 KiB
Diff
From 8b61a1a33e41456ebeafa0ebe7ec0fccf859861e Mon Sep 17 00:00:00 2001
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From: Nikolay Martynov <mar.kolya@gmail.com>
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Date: Wed, 25 Nov 2015 20:43:46 -0500
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Subject: [PATCH] mtd: nand: Fix Spansion sparearea size detection
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According to datasheet S34ML02G2 and S34ML04G2 have
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larger sparea area size than was detected.
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Signed-off-by: Nikolay Martynov <mar.kolya@gmail.com>
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---
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drivers/mtd/nand/nand_base.c | 9 +++++++++
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1 file changed, 9 insertions(+)
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--- a/drivers/mtd/nand/nand_base.c
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+++ b/drivers/mtd/nand/nand_base.c
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@@ -3853,6 +3853,7 @@ static void nand_decode_ext_id(struct mt
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/*
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* Field definitions are in the following datasheets:
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* Old style (4,5 byte ID): Samsung K9GAG08U0M (p.32)
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+ * Spansion S34ML02G2 (p.33)
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* New Samsung (6 byte ID): Samsung K9GAG08U0F (p.44)
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* Hynix MLC (6 byte ID): Hynix H27UBG8T2B (p.22)
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*
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@@ -3950,6 +3951,19 @@ static void nand_decode_ext_id(struct mt
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*busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0;
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/*
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+ * Spansion S34ML0[24]G2 have oobsize twice as large
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+ * as S34ML01G2 encoded in the same bit. We
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+ * differinciate them by their ID length
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+ */
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+ if (id_data[0] == NAND_MFR_AMD
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+ && (id_data[1] == 0xda
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+ || id_data[1] == 0xdc
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+ || id_data[1] == 0xca
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+ || id_data[1] == 0xcc)) {
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+ mtd->oobsize *= 2;
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+ }
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+
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+ /*
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* Toshiba 24nm raw SLC (i.e., not BENAND) have 32B OOB per
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* 512B page. For Toshiba SLC, we decode the 5th/6th byte as
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* follows:
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