3bbc3bd1bd
+ Refresh patches compile/run-tested on cns3xxx & imx6. Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
54 lines
2.3 KiB
Diff
54 lines
2.3 KiB
Diff
From fcdefccac976ee51dd6071832b842d8fb41c479c Mon Sep 17 00:00:00 2001
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From: Andy Gospodarek <gospo@broadcom.com>
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Date: Mon, 31 Oct 2016 13:32:03 -0400
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Subject: [PATCH] bgmac: stop clearing DMA receive control register right after
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it is set
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Current bgmac code initializes some DMA settings in the receive control
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register for some hardware and then immediately clears those settings.
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Not clearing those settings results in ~420Mbps *improvement* in
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throughput; this system can now receive frames at line-rate on Broadcom
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5871x hardware compared to ~520Mbps today. I also tested a few other
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values but found there to be no discernible difference in CPU
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utilization even if burst size and prefetching values are different.
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On the hardware tested there was no need to keep the code that cleared
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all but bits 16-17, but since there is a wide variety of hardware that
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used this driver (I did not look at all hardware docs for hardware using
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this IP block), I find it wise to move this call up and clear bits just
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after reading the default value from the hardware rather than completely
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removing it.
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This is a good candidate for -stable >=3.14 since that is when the code
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that was supposed to improve performance (but did not) was introduced.
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Signed-off-by: Andy Gospodarek <gospo@broadcom.com>
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Fixes: 56ceecde1f29 ("bgmac: initialize the DMA controller of core...")
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Cc: Hauke Mehrtens <hauke@hauke-m.de>
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Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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drivers/net/ethernet/broadcom/bgmac.c | 5 ++++-
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1 file changed, 4 insertions(+), 1 deletion(-)
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--- a/drivers/net/ethernet/broadcom/bgmac.c
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+++ b/drivers/net/ethernet/broadcom/bgmac.c
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@@ -307,6 +307,10 @@ static void bgmac_dma_rx_enable(struct b
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u32 ctl;
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ctl = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_RX_CTL);
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+
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+ /* preserve ONLY bits 16-17 from current hardware value */
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+ ctl &= BGMAC_DMA_RX_ADDREXT_MASK;
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+
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if (bgmac->feature_flags & BGMAC_FEAT_RX_MASK_SETUP) {
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ctl &= ~BGMAC_DMA_RX_BL_MASK;
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ctl |= BGMAC_DMA_RX_BL_128 << BGMAC_DMA_RX_BL_SHIFT;
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@@ -317,7 +321,6 @@ static void bgmac_dma_rx_enable(struct b
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ctl &= ~BGMAC_DMA_RX_PT_MASK;
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ctl |= BGMAC_DMA_RX_PT_1 << BGMAC_DMA_RX_PT_SHIFT;
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}
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- ctl &= BGMAC_DMA_RX_ADDREXT_MASK;
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ctl |= BGMAC_DMA_RX_ENABLE;
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ctl |= BGMAC_DMA_RX_PARITY_DISABLE;
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ctl |= BGMAC_DMA_RX_OVERFLOW_CONT;
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