171 lines
3.8 KiB
C
171 lines
3.8 KiB
C
/*
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* ADM5120 specific interrupt handlers
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*
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* Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/version.h>
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <linux/ioport.h>
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#include <linux/io.h>
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#include <linux/bitops.h>
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#include <asm/irq_cpu.h>
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#include <asm/mipsregs.h>
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#include <asm/mach-adm5120/adm5120_defs.h>
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static void adm5120_intc_irq_unmask(struct irq_data *d);
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static void adm5120_intc_irq_mask(struct irq_data *d);
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static int adm5120_intc_irq_set_type(struct irq_data *d, unsigned int flow_type);
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static inline void intc_write_reg(unsigned int reg, u32 val)
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{
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void __iomem *base = (void __iomem *)KSEG1ADDR(ADM5120_INTC_BASE);
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__raw_writel(val, base + reg);
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}
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static inline u32 intc_read_reg(unsigned int reg)
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{
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void __iomem *base = (void __iomem *)KSEG1ADDR(ADM5120_INTC_BASE);
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return __raw_readl(base + reg);
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}
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static struct irq_chip adm5120_intc_irq_chip = {
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.name = "INTC",
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.irq_unmask = adm5120_intc_irq_unmask,
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.irq_mask = adm5120_intc_irq_mask,
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.irq_mask_ack = adm5120_intc_irq_mask,
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.irq_set_type = adm5120_intc_irq_set_type
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};
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static struct irqaction adm5120_intc_irq_action = {
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.handler = no_action,
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.name = "cascade [INTC]"
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};
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static void adm5120_intc_irq_unmask(struct irq_data *d)
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{
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intc_write_reg(INTC_REG_IRQ_ENABLE, 1 << (d->irq - ADM5120_INTC_IRQ_BASE));
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}
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static void adm5120_intc_irq_mask(struct irq_data *d)
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{
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intc_write_reg(INTC_REG_IRQ_DISABLE, 1 << (d->irq - ADM5120_INTC_IRQ_BASE));
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}
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static int adm5120_intc_irq_set_type(struct irq_data *d, unsigned int flow_type)
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{
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unsigned int irq = d->irq;
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unsigned int sense;
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unsigned long mode;
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int err = 0;
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sense = flow_type & (IRQ_TYPE_SENSE_MASK);
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switch (sense) {
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case IRQ_TYPE_NONE:
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case IRQ_TYPE_LEVEL_HIGH:
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break;
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case IRQ_TYPE_LEVEL_LOW:
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switch (irq) {
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case ADM5120_IRQ_GPIO2:
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case ADM5120_IRQ_GPIO4:
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break;
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default:
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err = -EINVAL;
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break;
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}
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break;
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default:
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err = -EINVAL;
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break;
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}
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if (err)
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return err;
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switch (irq) {
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case ADM5120_IRQ_GPIO2:
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case ADM5120_IRQ_GPIO4:
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mode = intc_read_reg(INTC_REG_INT_MODE);
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if (sense == IRQ_TYPE_LEVEL_LOW)
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mode |= (1 << (irq - ADM5120_INTC_IRQ_BASE));
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else
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mode &= ~(1 << (irq - ADM5120_INTC_IRQ_BASE));
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intc_write_reg(INTC_REG_INT_MODE, mode);
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break;
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}
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return 0;
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}
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static void adm5120_intc_irq_dispatch(void)
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{
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unsigned long status;
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int irq;
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status = intc_read_reg(INTC_REG_IRQ_STATUS) & INTC_INT_ALL;
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if (status) {
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irq = ADM5120_INTC_IRQ_BASE + fls(status) - 1;
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do_IRQ(irq);
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} else
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spurious_interrupt();
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}
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asmlinkage void plat_irq_dispatch(void)
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{
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unsigned long pending;
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pending = read_c0_status() & read_c0_cause() & ST0_IM;
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if (pending & STATUSF_IP7)
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do_IRQ(ADM5120_IRQ_COUNTER);
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else if (pending & STATUSF_IP2)
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adm5120_intc_irq_dispatch();
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else
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spurious_interrupt();
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}
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#define INTC_IRQ_STATUS (IRQ_LEVEL | IRQ_TYPE_LEVEL_HIGH | IRQ_DISABLED)
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static void __init adm5120_intc_irq_init(void)
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{
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int i;
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/* disable all interrupts */
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intc_write_reg(INTC_REG_IRQ_DISABLE, INTC_INT_ALL);
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/* setup all interrupts to generate IRQ instead of FIQ */
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intc_write_reg(INTC_REG_INT_MODE, 0);
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/* set active level for all external interrupts to HIGH */
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intc_write_reg(INTC_REG_INT_LEVEL, 0);
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/* disable usage of the TEST_SOURCE register */
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intc_write_reg(INTC_REG_IRQ_SOURCE_SELECT, 0);
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for (i = ADM5120_INTC_IRQ_BASE;
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i <= ADM5120_INTC_IRQ_BASE + INTC_IRQ_LAST;
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i++) {
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irq_set_chip_and_handler(i, &adm5120_intc_irq_chip,
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handle_level_irq);
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}
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setup_irq(ADM5120_IRQ_INTC, &adm5120_intc_irq_action);
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}
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void __init arch_init_irq(void)
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{
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mips_cpu_irq_init();
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adm5120_intc_irq_init();
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}
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