41e7d2e2e8
Now we can activate some compiler optimizations for the cortex A7. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
21 lines
760 B
Text
21 lines
760 B
Text
# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
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# CONFIG_ARM_ERRATA_643719 is not set
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# CONFIG_ARM_LPAE is not set
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# CONFIG_MACH_SUN6I is not set
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# CONFIG_MACH_SUN7I is not set
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# CONFIG_MACH_SUN8I is not set
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# CONFIG_MACH_SUN9I is not set
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CONFIG_PGTABLE_LEVELS=2
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# CONFIG_PHYS_ADDR_T_64BIT is not set
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# CONFIG_PINCTRL_SUN6I_A31 is not set
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# CONFIG_PINCTRL_SUN6I_A31S is not set
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# CONFIG_PINCTRL_SUN6I_A31_R is not set
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# CONFIG_PINCTRL_SUN7I_A20 is not set
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# CONFIG_PINCTRL_SUN8I_A23 is not set
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# CONFIG_PINCTRL_SUN8I_A23_R is not set
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# CONFIG_PINCTRL_SUN8I_A33 is not set
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# CONFIG_PINCTRL_SUN8I_A83T is not set
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# CONFIG_PINCTRL_SUN8I_H3 is not set
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# CONFIG_PINCTRL_SUN8I_H3_R is not set
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# CONFIG_PINCTRL_SUN9I_A80 is not set
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# CONFIG_PINCTRL_SUN9I_A80_R is not set
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