25afe99b31
the support is still WIP. next steps are to make the pmic and ethernet work. this is the first commit to make sure nothing gets lost. Signed-off-by: John Crispin <blogic@openwrt.org> SVN-Revision: 47354
178 lines
5.1 KiB
Diff
178 lines
5.1 KiB
Diff
From daa2c1f9202f08628d4f91a1cf4dafb44c9bcafe Mon Sep 17 00:00:00 2001
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From: "Joe.C" <yingjoe.chen@mediatek.com>
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Date: Fri, 1 May 2015 15:43:28 +0800
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Subject: [PATCH 42/76] ARM: mediatek: add smp bringup code
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Add support for booting secondary CPUs on mt6589, mt8127
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and mt8135.
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Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
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---
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arch/arm/mach-mediatek/Makefile | 3 +
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arch/arm/mach-mediatek/platsmp.c | 145 ++++++++++++++++++++++++++++++++++++++
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2 files changed, 148 insertions(+)
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create mode 100644 arch/arm/mach-mediatek/platsmp.c
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diff --git a/arch/arm/mach-mediatek/Makefile b/arch/arm/mach-mediatek/Makefile
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index 43e619f..2116460 100644
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--- a/arch/arm/mach-mediatek/Makefile
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+++ b/arch/arm/mach-mediatek/Makefile
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@@ -1 +1,4 @@
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+ifeq ($(CONFIG_SMP),y)
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+obj-$(CONFIG_ARCH_MEDIATEK) += platsmp.o
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+endif
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obj-$(CONFIG_ARCH_MEDIATEK) += mediatek.o
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diff --git a/arch/arm/mach-mediatek/platsmp.c b/arch/arm/mach-mediatek/platsmp.c
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new file mode 100644
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index 0000000..e266b3d
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--- /dev/null
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+++ b/arch/arm/mach-mediatek/platsmp.c
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@@ -0,0 +1,145 @@
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+/*
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+ * arch/arm/mach-mediatek/platsmp.c
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+ *
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+ * Copyright (c) 2014 Mediatek Inc.
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+ * Author: Shunli Wang <shunli.wang@mediatek.com>
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+ * Yingjoe Chen <yingjoe.chen@mediatek.com>
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2 as
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+ * published by the Free Software Foundation.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ */
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+#include <linux/io.h>
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+#include <linux/memblock.h>
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+#include <linux/of.h>
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+#include <linux/of_address.h>
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+#include <linux/string.h>
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+#include <linux/threads.h>
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+
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+#define MTK_MAX_CPU 8
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+#define MTK_SMP_REG_SIZE 0x1000
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+
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+struct mtk_smp_boot_info {
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+ unsigned long smp_base;
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+ unsigned int jump_reg;
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+ unsigned int boot_reg;
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+ unsigned int core_keys[MTK_MAX_CPU - 1];
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+ unsigned int core_regs[MTK_MAX_CPU - 1];
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+};
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+
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+static const struct mtk_smp_boot_info mtk_mt8135_tz_boot = {
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+ 0x80002000, 1020, 1012,
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+ { 0x534c4131, 0x4c415332, 0x41534c33 },
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+ { 1016, 1016, 1016},
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+};
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+
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+static const struct mtk_smp_boot_info mtk_mt6589_boot = {
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+ 0x10002000, 0x34, 0x30,
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+ { 0x534c4131, 0x4c415332, 0x41534c33 },
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+ { 0x38, 0x3c, 0x40 },
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+};
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+
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+static const struct of_device_id mtk_tz_smp_boot_infos[] __initconst = {
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+ { .compatible = "mediatek,mt8135", .data = &mtk_mt8135_tz_boot },
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+ { .compatible = "mediatek,mt8127", .data = &mtk_mt8135_tz_boot },
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+};
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+
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+static const struct of_device_id mtk_smp_boot_infos[] __initconst = {
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+ { .compatible = "mediatek,mt6589", .data = &mtk_mt6589_boot },
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+};
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+
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+static void __iomem *mtk_smp_base;
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+static const struct mtk_smp_boot_info *mtk_smp_info;
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+
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+static int mtk_boot_secondary(unsigned int cpu, struct task_struct *idle)
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+{
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+ if (!mtk_smp_base)
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+ return -EINVAL;
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+
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+ if (!mtk_smp_info->core_keys[cpu-1])
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+ return -EINVAL;
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+
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+ writel_relaxed(mtk_smp_info->core_keys[cpu-1],
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+ mtk_smp_base + mtk_smp_info->core_regs[cpu-1]);
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+
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+ arch_send_wakeup_ipi_mask(cpumask_of(cpu));
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+
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+ return 0;
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+}
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+
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+static void __init __mtk_smp_prepare_cpus(unsigned int max_cpus, int trustzone)
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+{
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+ int i, num;
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+ const struct of_device_id *infos;
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+
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+ if (trustzone) {
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+ num = ARRAY_SIZE(mtk_tz_smp_boot_infos);
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+ infos = mtk_tz_smp_boot_infos;
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+ } else {
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+ num = ARRAY_SIZE(mtk_smp_boot_infos);
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+ infos = mtk_smp_boot_infos;
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+ }
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+
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+ /* Find smp boot info for this SoC */
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+ for (i = 0; i < num; i++) {
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+ if (of_machine_is_compatible(infos[i].compatible)) {
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+ mtk_smp_info = infos[i].data;
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+ break;
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+ }
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+ }
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+
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+ if (!mtk_smp_info) {
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+ pr_err("%s: Device is not supported\n", __func__);
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+ return;
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+ }
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+
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+ if (trustzone) {
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+ if (memblock_reserve(mtk_smp_info->smp_base, MTK_SMP_REG_SIZE)) {
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+ pr_err("%s: Can't reserve smp memory\n", __func__);
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+ return;
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+ }
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+ mtk_smp_base = phys_to_virt(mtk_smp_info->smp_base);
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+ } else {
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+ mtk_smp_base = ioremap(mtk_smp_info->smp_base, MTK_SMP_REG_SIZE);
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+ if (!mtk_smp_base) {
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+ pr_err("%s: Can't remap %lx\n", __func__,
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+ mtk_smp_info->smp_base);
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+ return;
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+ }
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+ }
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+
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+ /*
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+ * write the address of slave startup address into the system-wide
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+ * jump register
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+ */
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+ writel_relaxed(virt_to_phys(secondary_startup),
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+ mtk_smp_base + mtk_smp_info->jump_reg);
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+}
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+
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+static void __init mtk_tz_smp_prepare_cpus(unsigned int max_cpus)
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+{
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+ __mtk_smp_prepare_cpus(max_cpus, 1);
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+}
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+
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+static void __init mtk_smp_prepare_cpus(unsigned int max_cpus)
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+{
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+ __mtk_smp_prepare_cpus(max_cpus, 0);
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+}
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+
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+static struct smp_operations mt81xx_tz_smp_ops __initdata = {
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+ .smp_prepare_cpus = mtk_tz_smp_prepare_cpus,
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+ .smp_boot_secondary = mtk_boot_secondary,
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+};
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+CPU_METHOD_OF_DECLARE(mt81xx_tz_smp, "mediatek,mt81xx-tz-smp", &mt81xx_tz_smp_ops);
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+
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+static struct smp_operations mt65xx_smp_ops __initdata = {
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+ .smp_prepare_cpus = mtk_smp_prepare_cpus,
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+ .smp_boot_secondary = mtk_boot_secondary,
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+};
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+CPU_METHOD_OF_DECLARE(mt65xx_smp, "mediatek,mt65xx-smp", &mt65xx_smp_ops);
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--
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1.7.10.4
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