49 lines
1.2 KiB
Diff
49 lines
1.2 KiB
Diff
--- a/arch/mips/ath79/dev-eth.c
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+++ b/arch/mips/ath79/dev-eth.c
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@@ -331,6 +331,10 @@ static void ar934x_set_speed_ge1(int spe
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/* TODO */
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}
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+static void ath79_ddr_no_flush(void)
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+{
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+}
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+
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static void ath79_ddr_flush_ge0(void)
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{
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ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_GE0);
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@@ -371,16 +375,6 @@ static void ar933x_ddr_flush_ge1(void)
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ath79_ddr_wb_flush(AR933X_DDR_REG_FLUSH_GE1);
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}
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-static void ar934x_ddr_flush_ge0(void)
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-{
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- ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_GE0);
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-}
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-
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-static void ar934x_ddr_flush_ge1(void)
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-{
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- ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_GE1);
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-}
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-
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static struct resource ath79_eth0_resources[] = {
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{
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.name = "mac_base",
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@@ -817,17 +811,16 @@ void __init ath79_register_eth(unsigned
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if (id == 0) {
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pdata->reset_bit = AR934X_RESET_GE0_MAC |
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AR934X_RESET_GE0_MDIO;
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- pdata->ddr_flush =ar934x_ddr_flush_ge0;
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pdata->set_speed = ar934x_set_speed_ge0;
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} else {
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pdata->reset_bit = AR934X_RESET_GE1_MAC |
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AR934X_RESET_GE1_MDIO;
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- pdata->ddr_flush = ar934x_ddr_flush_ge1;
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pdata->set_speed = ar934x_set_speed_ge1;
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pdata->switch_data = &ath79_switch_data;
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}
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+ pdata->ddr_flush = ath79_ddr_no_flush;
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pdata->has_gbit = 1;
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pdata->is_ar724x = 1;
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