3af779eb17
This is a backport of the patches accepted to the Linux mainline related to mvebu SoC (Armada XP and Armada 370) between Linux v3.11, and Linux v3.12. This work mainly covers: * Ground work for sharing the pxa nand driver(drivers/mtd/nand/pxa3xx_nand.c) between the PXA family,and the Armada family. * Further updates to the mvebu MBus. * Work and ground work for enabling MSI on the Armada family. * some phy / mdio bus initialization related work. * Device tree binding documentation update. Signed-off-by: Seif Mazareeb <seif.mazareeb@gmail.com> CC: Luka Perkov <luka@openwrt.org> SVN-Revision: 39565
33 lines
1.1 KiB
Diff
33 lines
1.1 KiB
Diff
From 408b807592d9cdbc1a69b119f4a862b2ab1e4d87 Mon Sep 17 00:00:00 2001
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From: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
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Date: Fri, 18 Oct 2013 20:02:31 -0300
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Subject: [PATCH 098/203] ARM: mvebu: Add the core-divider clock to Armada
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370/XP
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The Armada 370/XP SoC has a clock provider called "Core Divider",
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that is derived from a fixed 2 GHz PLL clock.
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Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
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Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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---
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arch/arm/boot/dts/armada-370-xp.dtsi | 8 ++++++++
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1 file changed, 8 insertions(+)
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--- a/arch/arm/boot/dts/armada-370-xp.dtsi
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+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
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@@ -134,6 +134,14 @@
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status = "disabled";
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};
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+ coredivclk: corediv-clock@18740 {
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+ compatible = "marvell,armada-370-corediv-clock";
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+ reg = <0x18740 0xc>;
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+ #clock-cells = <1>;
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+ clocks = <&mainpll>;
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+ clock-output-names = "nand";
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+ };
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+
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timer@20300 {
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compatible = "marvell,armada-370-xp-timer";
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reg = <0x20300 0x30>, <0x21040 0x30>;
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