c6aac196b8
The pinctrl initialization fails with the MSM pinctrl code and gpio-hogs because either the gpio ranges are not yet initialized (missing gpio-range in DT) or that the msm driver unconditionally tries to re-initializes the ranges (gpio-range in DT). To allow gpio-hogs and similar early-boot gpio code, the gpio-ranges must be in the device tree and the pinctrl-msm code must check whether the range was already initialized by the DT. Signed-off-by: Sven Eckelmann <sven.eckelmann@openmesh.com> [drop changes to unrelated dtsi files, refresh patches] Signed-off-by: Mathias Kresin <dev@kresin.me>
46 lines
1.3 KiB
Diff
46 lines
1.3 KiB
Diff
From 9deeec35dd3b628b95624e41d4e04acf728991ba Mon Sep 17 00:00:00 2001
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From: Christian Lamparter <chunkeey@gmail.com>
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Date: Sun, 20 Nov 2016 02:20:54 +0100
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Subject: [PATCH] dts: ipq4019: add PHY/switch nodes
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This patch adds both the "qcom,ess-switch" and "qcom,ess-psgmii"
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nodes which are needed for the ar40xx.c driver to initialize the
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switch.
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Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
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---
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arch/arm/boot/dts/qcom-ipq4019.dtsi | 23 +++++++++++++++++++++++
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1 file changed, 23 insertions(+)
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--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
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@@ -568,6 +568,29 @@
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};
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};
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+ ess-switch@c000000 {
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+ compatible = "qcom,ess-switch";
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+ reg = <0xc000000 0x80000>;
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+ switch_access_mode = "local bus";
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+ resets = <&gcc ESS_RESET>;
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+ reset-names = "ess_rst";
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+ clocks = <&gcc GCC_ESS_CLK>;
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+ clock-names = "ess_clk";
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+ switch_cpu_bmp = <0x1>;
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+ switch_lan_bmp = <0x1e>;
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+ switch_wan_bmp = <0x20>;
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+ switch_mac_mode = <0>; /* PORT_WRAPPER_PSGMII */
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+ switch_initvlas = <0x7c 0x54>;
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+ status = "disabled";
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+ };
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+
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+ ess-psgmii@98000 {
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+ compatible = "qcom,ess-psgmii";
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+ reg = <0x98000 0x800>;
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+ psgmii_access_mode = "local bus";
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+ status = "disabled";
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+ };
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+
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usb3_ss_phy: ssphy@9a000 {
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compatible = "qca,uni-ssphy";
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reg = <0x9a000 0x800>;
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