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mips/ar7
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disable dsp freq use for vlynq bus clock init, disable external clocking (it locks up on c54apra2+) and revert to internal clocking trying various clock divisors. cleanup: * remove volative and use readl & writel accessors instead * use set_irq_chip & friends for irq setup * use kzalloc instead of kmalloc * secure VINT_VECTOR macro argument * remove unused vlynq_local_id function
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2007-09-11 14:50:43 +00:00 |
