2ec0cba393
http://us.fixstars.com/products/gigaaccel/ This build will create zImage suitable for TFTP boot image. * v2 - add axonram device driver - switch to 2.6.30.1 Signed-off-by: Akinobu Mita <mita@fixstars.com> SVN-Revision: 16860
107 lines
4 KiB
Diff
107 lines
4 KiB
Diff
commit 5a2642f620eb6e40792822fa0eafe23046fbb55e
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Author: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Date: Mon Jun 22 16:47:59 2009 +0000
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powerpc/mpic: Fix mapping of "DCR" based MPIC variants
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Commit 31207dab7d2e63795eb15823947bd2f7025b08e2
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"Fix incorrect allocation of interrupt rev-map"
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introduced a regression crashing on boot on machines using
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a "DCR" based MPIC, such as the Cell blades.
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The reason is that the irq host data structure is initialized
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much later as a result of that patch, causing our calls to
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mpic_map() do be done before we have a host setup.
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Unfortunately, this breaks _mpic_map_dcr() which uses the
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mpic->irqhost to get to the device node.
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This fixes it by, instead, passing the device node explicitely
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to mpic_map().
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Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Acked-by: Akira Tsukamoto <akirat@rd.scei.sony.co.jp>
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diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
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index 9c3af50..32a2e95 100644
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--- a/arch/powerpc/sysdev/mpic.c
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+++ b/arch/powerpc/sysdev/mpic.c
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@@ -279,28 +279,29 @@ static void _mpic_map_mmio(struct mpic *mpic, phys_addr_t phys_addr,
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}
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#ifdef CONFIG_PPC_DCR
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-static void _mpic_map_dcr(struct mpic *mpic, struct mpic_reg_bank *rb,
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+static void _mpic_map_dcr(struct mpic *mpic, struct device_node *node,
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+ struct mpic_reg_bank *rb,
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unsigned int offset, unsigned int size)
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{
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const u32 *dbasep;
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- dbasep = of_get_property(mpic->irqhost->of_node, "dcr-reg", NULL);
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+ dbasep = of_get_property(node, "dcr-reg", NULL);
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- rb->dhost = dcr_map(mpic->irqhost->of_node, *dbasep + offset, size);
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+ rb->dhost = dcr_map(node, *dbasep + offset, size);
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BUG_ON(!DCR_MAP_OK(rb->dhost));
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}
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-static inline void mpic_map(struct mpic *mpic, phys_addr_t phys_addr,
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- struct mpic_reg_bank *rb, unsigned int offset,
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- unsigned int size)
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+static inline void mpic_map(struct mpic *mpic, struct device_node *node,
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+ phys_addr_t phys_addr, struct mpic_reg_bank *rb,
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+ unsigned int offset, unsigned int size)
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{
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if (mpic->flags & MPIC_USES_DCR)
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- _mpic_map_dcr(mpic, rb, offset, size);
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+ _mpic_map_dcr(mpic, node, rb, offset, size);
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else
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_mpic_map_mmio(mpic, phys_addr, rb, offset, size);
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}
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#else /* CONFIG_PPC_DCR */
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-#define mpic_map(m,p,b,o,s) _mpic_map_mmio(m,p,b,o,s)
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+#define mpic_map(m,n,p,b,o,s) _mpic_map_mmio(m,p,b,o,s)
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#endif /* !CONFIG_PPC_DCR */
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@@ -1152,8 +1153,8 @@ struct mpic * __init mpic_alloc(struct device_node *node,
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}
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/* Map the global registers */
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- mpic_map(mpic, paddr, &mpic->gregs, MPIC_INFO(GREG_BASE), 0x1000);
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- mpic_map(mpic, paddr, &mpic->tmregs, MPIC_INFO(TIMER_BASE), 0x1000);
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+ mpic_map(mpic, node, paddr, &mpic->gregs, MPIC_INFO(GREG_BASE), 0x1000);
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+ mpic_map(mpic, node, paddr, &mpic->tmregs, MPIC_INFO(TIMER_BASE), 0x1000);
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/* Reset */
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if (flags & MPIC_WANTS_RESET) {
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@@ -1194,7 +1195,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
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/* Map the per-CPU registers */
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for (i = 0; i < mpic->num_cpus; i++) {
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- mpic_map(mpic, paddr, &mpic->cpuregs[i],
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+ mpic_map(mpic, node, paddr, &mpic->cpuregs[i],
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MPIC_INFO(CPU_BASE) + i * MPIC_INFO(CPU_STRIDE),
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0x1000);
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}
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@@ -1202,7 +1203,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
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/* Initialize main ISU if none provided */
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if (mpic->isu_size == 0) {
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mpic->isu_size = mpic->num_sources;
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- mpic_map(mpic, paddr, &mpic->isus[0],
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+ mpic_map(mpic, node, paddr, &mpic->isus[0],
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MPIC_INFO(IRQ_BASE), MPIC_INFO(IRQ_STRIDE) * mpic->isu_size);
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}
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mpic->isu_shift = 1 + __ilog2(mpic->isu_size - 1);
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@@ -1256,8 +1257,10 @@ void __init mpic_assign_isu(struct mpic *mpic, unsigned int isu_num,
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BUG_ON(isu_num >= MPIC_MAX_ISU);
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- mpic_map(mpic, paddr, &mpic->isus[isu_num], 0,
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+ mpic_map(mpic, mpic->irqhost->of_node,
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+ paddr, &mpic->isus[isu_num], 0,
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MPIC_INFO(IRQ_STRIDE) * mpic->isu_size);
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+
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if ((isu_first + mpic->isu_size) > mpic->num_sources)
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mpic->num_sources = isu_first + mpic->isu_size;
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}
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