John Crispin 2c7d536780 lantiq: Fixed reading the number of RX FIFOs in the SPI driver ... Until now the SPI driver used the TX bits for the RX FIFO. This seems uncritical for now since both are equals on my devices (VR9), but this could cause problems on other SoCs. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> SVN-Revision: 47208		2015-10-19 10:08:18 +00:00
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base-files	lantiq: bugfix wrong non pre-emptive crc errors output	2015-10-11 16:23:26 +00:00
dts	Revert "lantiq: activate spi-xway on TDW89X0"	2015-10-19 10:08:12 +00:00
files/firmware/lantiq	move GPHY FW blobs to non versioned folder	2013-03-14 18:42:21 +00:00
image	lantiq: Add target TP-Link TD-W8980	2015-10-05 10:28:19 +00:00
patches-3.18	lantiq: Fixed reading the number of RX FIFOs in the SPI driver	2015-10-19 10:08:18 +00:00
patches-4.1	lantiq: Fixed reading the number of RX FIFOs in the SPI driver	2015-10-19 10:08:18 +00:00
xrx200	lantiq: Add target TP-Link TD-W8980	2015-10-05 10:28:19 +00:00
xway	lantiq: Add support for Arcadyan ARV8539PW22 (Speedport W 504V)	2015-07-07 13:44:58 +00:00
base-files.mk	lantiq: add runtime generation of /etc/config/network	2011-11-15 18:21:00 +00:00
config-3.18	kernel: move CONFIG_MIPS_O32_FP64_SUPPORT to generic configs	2015-03-01 11:37:15 +00:00
config-4.1	kernel: add CONFIG_MIPS_CDMM config option	2015-09-11 20:31:32 +00:00
Makefile	lantiq: make v4.1 the default kernel	2015-10-05 10:28:26 +00:00
modules.mk	fix i2c-lantiq module	2012-12-16 10:03:18 +00:00