a098a78a33
This will make it easier to port upstream code. Signed-off-by: Rosen Penev <rosenp@gmail.com>
20 lines
761 B
Diff
20 lines
761 B
Diff
From fec11d4e8dc5cc79bcd7c8fd55038ac21ac39965 Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Sun, 16 Mar 2014 05:22:39 +0000
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Subject: [PATCH 04/53] MIPS: ralink: add MT7621 pcie driver
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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arch/mips/pci/Makefile | 1 +
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1 file changed, 1 insertion(+)
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--- a/arch/mips/pci/Makefile
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+++ b/arch/mips/pci/Makefile
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@@ -47,6 +47,7 @@ obj-$(CONFIG_SNI_RM) += fixup-sni.o ops
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obj-$(CONFIG_LANTIQ) += fixup-lantiq.o
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obj-$(CONFIG_PCI_LANTIQ) += pci-lantiq.o ops-lantiq.o
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obj-$(CONFIG_SOC_MT7620) += pci-mt7620.o
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+obj-$(CONFIG_SOC_MT7621) += pci-mt7621.o
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obj-$(CONFIG_SOC_RT288X) += pci-rt2880.o
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obj-$(CONFIG_SOC_RT3883) += pci-rt3883.o
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obj-$(CONFIG_TANBAC_TB0219) += fixup-tb0219.o
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