416 lines
10 KiB
C
416 lines
10 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
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*
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* Copyright (C) 2005 Wu Qi Ming <Qi-Ming.Wu@infineon.com>
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* Copyright (C) 2008 John Crispin <blogic@openwrt.org>
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*/
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/errno.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <asm/uaccess.h>
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#include <linux/in.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/ip.h>
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#include <linux/tcp.h>
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#include <linux/skbuff.h>
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#include <linux/mm.h>
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#include <linux/platform_device.h>
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#include <linux/ethtool.h>
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#include <asm/checksum.h>
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#include <linux/init.h>
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#include <asm/delay.h>
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#include <asm/ifxmips/ifxmips.h>
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#include <asm/ifxmips/ifxmips_dma.h>
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#include <asm/ifxmips/ifxmips_pmu.h>
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struct ifxmips_mii_priv {
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struct net_device_stats stats;
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struct dma_device_info *dma_device;
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struct sk_buff *skb;
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};
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static struct net_device *ifxmips_mii0_dev;
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static unsigned char mac_addr[MAX_ADDR_LEN];
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void
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ifxmips_write_mdio(u32 phy_addr, u32 phy_reg, u16 phy_data)
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{
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u32 val = MDIO_ACC_REQUEST |
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((phy_addr & MDIO_ACC_ADDR_MASK) << MDIO_ACC_ADDR_OFFSET) |
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((phy_reg & MDIO_ACC_REG_MASK) << MDIO_ACC_REG_OFFSET) |
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phy_data;
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while(ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_REQUEST);
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ifxmips_w32(val, IFXMIPS_PPE32_MDIO_ACC);
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}
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EXPORT_SYMBOL(ifxmips_write_mdio);
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unsigned short
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ifxmips_read_mdio(u32 phy_addr, u32 phy_reg)
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{
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u32 val = MDIO_ACC_REQUEST | MDIO_ACC_READ |
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((phy_addr & MDIO_ACC_ADDR_MASK) << MDIO_ACC_ADDR_OFFSET) |
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((phy_reg & MDIO_ACC_REG_MASK) << MDIO_ACC_REG_OFFSET);
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while(ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_REQUEST);
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ifxmips_w32(val, IFXMIPS_PPE32_MDIO_ACC);
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while(ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_REQUEST){};
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val = ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_VAL_MASK;
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return val;
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}
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EXPORT_SYMBOL(ifxmips_read_mdio);
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int
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ifxmips_ifxmips_mii_open(struct net_device *dev)
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{
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struct ifxmips_mii_priv* priv = (struct ifxmips_mii_priv*)dev->priv;
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struct dma_device_info* dma_dev = priv->dma_device;
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int i;
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for(i = 0; i < dma_dev->max_rx_chan_num; i++)
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{
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if((dma_dev->rx_chan[i])->control == IFXMIPS_DMA_CH_ON)
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(dma_dev->rx_chan[i])->open(dma_dev->rx_chan[i]);
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}
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netif_start_queue(dev);
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return 0;
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}
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int
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ifxmips_mii_release(struct net_device *dev){
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struct ifxmips_mii_priv* priv = (struct ifxmips_mii_priv*)dev->priv;
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struct dma_device_info* dma_dev = priv->dma_device;
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int i;
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for(i = 0; i < dma_dev->max_rx_chan_num; i++)
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dma_dev->rx_chan[i]->close(dma_dev->rx_chan[i]);
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netif_stop_queue(dev);
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return 0;
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}
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int
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ifxmips_mii_hw_receive(struct net_device* dev,struct dma_device_info* dma_dev)
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{
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struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv*)dev->priv;
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unsigned char* buf = NULL;
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struct sk_buff *skb = NULL;
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int len = 0;
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len = dma_device_read(dma_dev, &buf, (void**)&skb);
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if(len >= ETHERNET_PACKET_DMA_BUFFER_SIZE)
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{
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printk(KERN_INFO "ifxmips_mii0: packet too large %d\n",len);
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goto ifxmips_mii_hw_receive_err_exit;
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}
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/* remove CRC */
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len -= 4;
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if(skb == NULL)
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{
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printk(KERN_INFO "ifxmips_mii0: cannot restore pointer\n");
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goto ifxmips_mii_hw_receive_err_exit;
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}
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if(len > (skb->end - skb->tail))
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{
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printk(KERN_INFO "ifxmips_mii0: BUG, len:%d end:%p tail:%p\n",
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(len+4), skb->end, skb->tail);
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goto ifxmips_mii_hw_receive_err_exit;
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}
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skb_put(skb, len);
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skb->dev = dev;
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skb->protocol = eth_type_trans(skb, dev);
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netif_rx(skb);
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priv->stats.rx_packets++;
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priv->stats.rx_bytes += len;
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return 0;
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ifxmips_mii_hw_receive_err_exit:
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if(len == 0)
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{
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if(skb)
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dev_kfree_skb_any(skb);
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priv->stats.rx_errors++;
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priv->stats.rx_dropped++;
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return -EIO;
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} else {
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return len;
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}
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}
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int
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ifxmips_mii_hw_tx(char *buf, int len, struct net_device *dev)
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{
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int ret = 0;
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struct ifxmips_mii_priv *priv = dev->priv;
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struct dma_device_info* dma_dev = priv->dma_device;
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ret = dma_device_write(dma_dev, buf, len, priv->skb);
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return ret;
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}
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int
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ifxmips_mii_tx(struct sk_buff *skb, struct net_device *dev)
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{
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int len;
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char *data;
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struct ifxmips_mii_priv *priv = dev->priv;
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struct dma_device_info* dma_dev = priv->dma_device;
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len = skb->len < ETH_ZLEN ? ETH_ZLEN : skb->len;
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data = skb->data;
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priv->skb = skb;
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dev->trans_start = jiffies;
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// TODO we got more than 1 dma channel, so we should do something intelligent
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// here to select one
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dma_dev->current_tx_chan = 0;
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wmb();
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if(ifxmips_mii_hw_tx(data, len, dev) != len)
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{
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dev_kfree_skb_any(skb);
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priv->stats.tx_errors++;
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priv->stats.tx_dropped++;
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} else {
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priv->stats.tx_packets++;
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priv->stats.tx_bytes+=len;
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}
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return 0;
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}
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void
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ifxmips_mii_tx_timeout(struct net_device *dev)
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{
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int i;
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struct ifxmips_mii_priv* priv = (struct ifxmips_mii_priv*)dev->priv;
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priv->stats.tx_errors++;
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for(i = 0; i < priv->dma_device->max_tx_chan_num; i++)
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priv->dma_device->tx_chan[i]->disable_irq(priv->dma_device->tx_chan[i]);
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netif_wake_queue(dev);
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return;
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}
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int
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dma_intr_handler(struct dma_device_info* dma_dev, int status)
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{
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int i;
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switch(status)
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{
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case RCV_INT:
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ifxmips_mii_hw_receive(ifxmips_mii0_dev, dma_dev);
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break;
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case TX_BUF_FULL_INT:
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printk(KERN_INFO "ifxmips_mii0: tx buffer full\n");
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netif_stop_queue(ifxmips_mii0_dev);
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for (i = 0; i < dma_dev->max_tx_chan_num; i++)
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{
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if ((dma_dev->tx_chan[i])->control==IFXMIPS_DMA_CH_ON)
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dma_dev->tx_chan[i]->enable_irq(dma_dev->tx_chan[i]);
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}
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break;
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case TRANSMIT_CPT_INT:
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for(i = 0; i < dma_dev->max_tx_chan_num; i++)
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dma_dev->tx_chan[i]->disable_irq(dma_dev->tx_chan[i]);
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netif_wake_queue(ifxmips_mii0_dev);
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break;
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}
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return 0;
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}
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unsigned char*
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ifxmips_etop_dma_buffer_alloc(int len, int *byte_offset, void **opt)
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{
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unsigned char *buffer = NULL;
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struct sk_buff *skb = NULL;
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skb = dev_alloc_skb(ETHERNET_PACKET_DMA_BUFFER_SIZE);
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if(skb == NULL)
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return NULL;
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buffer = (unsigned char*)(skb->data);
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skb_reserve(skb, 2);
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*(int*)opt = (int)skb;
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*byte_offset = 2;
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return buffer;
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}
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void
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ifxmips_etop_dma_buffer_free(unsigned char *dataptr, void *opt)
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{
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struct sk_buff *skb = NULL;
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if(opt == NULL)
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{
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kfree(dataptr);
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} else {
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skb = (struct sk_buff*)opt;
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dev_kfree_skb_any(skb);
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}
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}
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static struct net_device_stats*
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ifxmips_get_stats(struct net_device *dev)
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{
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return (struct net_device_stats *)dev->priv;
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}
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static int
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ifxmips_mii_dev_init(struct net_device *dev)
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{
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int i;
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struct ifxmips_mii_priv *priv;
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ether_setup(dev);
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printk(KERN_INFO "ifxmips_mii0: %s is up\n", dev->name);
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dev->open = ifxmips_ifxmips_mii_open;
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dev->stop = ifxmips_mii_release;
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dev->hard_start_xmit = ifxmips_mii_tx;
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dev->get_stats = ifxmips_get_stats;
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dev->tx_timeout = ifxmips_mii_tx_timeout;
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dev->watchdog_timeo = 10 * HZ;
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memset(dev->priv, 0, sizeof(struct ifxmips_mii_priv));
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priv = dev->priv;
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priv->dma_device = dma_device_reserve("PPE");
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if(!priv->dma_device){
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BUG();
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return -ENODEV;
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}
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priv->dma_device->buffer_alloc = &ifxmips_etop_dma_buffer_alloc;
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priv->dma_device->buffer_free = &ifxmips_etop_dma_buffer_free;
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priv->dma_device->intr_handler = &dma_intr_handler;
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priv->dma_device->max_rx_chan_num = 4;
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for(i = 0; i < priv->dma_device->max_rx_chan_num; i++)
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{
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priv->dma_device->rx_chan[i]->packet_size = ETHERNET_PACKET_DMA_BUFFER_SIZE;
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priv->dma_device->rx_chan[i]->control = IFXMIPS_DMA_CH_ON;
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}
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for(i = 0; i < priv->dma_device->max_tx_chan_num; i++)
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if(i == 0)
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priv->dma_device->tx_chan[i]->control = IFXMIPS_DMA_CH_ON;
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else
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priv->dma_device->tx_chan[i]->control = IFXMIPS_DMA_CH_OFF;
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dma_device_register(priv->dma_device);
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printk(KERN_INFO "ifxmips_mii0: using mac=");
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for(i = 0; i < 6; i++)
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{
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dev->dev_addr[i] = mac_addr[i];
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printk("%02X%c", dev->dev_addr[i], (i == 5)?('\n'):(':'));
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}
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return 0;
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}
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static void
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ifxmips_mii_chip_init(int mode)
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{
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ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_DMA);
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ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_PPE);
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if(mode == REV_MII_MODE)
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ifxmips_w32_mask(PPE32_MII_MASK, PPE32_MII_REVERSE, IFXMIPS_PPE32_CFG);
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else if(mode == MII_MODE)
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ifxmips_w32_mask(PPE32_MII_MASK, PPE32_MII_NORMAL, IFXMIPS_PPE32_CFG);
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ifxmips_w32(PPE32_PLEN_UNDER | PPE32_PLEN_OVER, IFXMIPS_PPE32_IG_PLEN_CTRL);
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ifxmips_w32(PPE32_CGEN, IFXMIPS_PPE32_ENET_MAC_CFG);
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wmb();
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}
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static int
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ifxmips_mii_probe(struct platform_device *dev)
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{
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int result = 0;
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unsigned char *mac = (unsigned char*)dev->dev.platform_data;
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ifxmips_mii0_dev = alloc_etherdev(sizeof(struct ifxmips_mii_priv));
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ifxmips_mii0_dev->init = ifxmips_mii_dev_init;
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memcpy(mac_addr, mac, 6);
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strcpy(ifxmips_mii0_dev->name, "eth%d");
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ifxmips_mii_chip_init(REV_MII_MODE);
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result = register_netdev(ifxmips_mii0_dev);
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if (result)
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{
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printk(KERN_INFO "ifxmips_mii0: error %i registering device \"%s\"\n", result, ifxmips_mii0_dev->name);
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goto out;
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}
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printk(KERN_INFO "ifxmips_mii0: driver loaded!\n");
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out:
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return result;
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}
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static int
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ifxmips_mii_remove(struct platform_device *dev)
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{
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struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv*)ifxmips_mii0_dev->priv;
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printk(KERN_INFO "ifxmips_mii0: ifxmips_mii0 cleanup\n");
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dma_device_unregister(priv->dma_device);
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dma_device_release(priv->dma_device);
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kfree(priv->dma_device);
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kfree(ifxmips_mii0_dev->priv);
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unregister_netdev(ifxmips_mii0_dev);
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return 0;
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}
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static struct
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platform_driver ifxmips_mii_driver = {
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.probe = ifxmips_mii_probe,
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.remove = ifxmips_mii_remove,
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.driver = {
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.name = "ifxmips_mii0",
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.owner = THIS_MODULE,
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},
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};
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int __init
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ifxmips_mii_init(void)
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{
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int ret = platform_driver_register(&ifxmips_mii_driver);
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if (ret)
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printk(KERN_INFO "ifxmips_mii0: Error registering platfom driver!");
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return ret;
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}
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static void __exit
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ifxmips_mii_cleanup(void)
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{
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platform_driver_unregister(&ifxmips_mii_driver);
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}
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module_init(ifxmips_mii_init);
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module_exit(ifxmips_mii_cleanup);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
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MODULE_DESCRIPTION("ethernet map driver for IFXMIPS boards");
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