af015f956c
Tested on the following boards: ALFA AP96 TL-MR3220 v1 TL-WR1043ND v1 TL-WR2543ND v1 TL-WR703N v1 TL-WR741ND v1 TL-WR741ND v4 WNDR3700 v1 WZR-HP-G300NH SVN-Revision: 29868
176 lines
4.4 KiB
C
176 lines
4.4 KiB
C
/*
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* Atheros AP96 board support
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*
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* Copyright (C) 2009 Marco Porsch
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* Copyright (C) 2009-2012 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2010 Atheros Communications
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/platform_device.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/delay.h>
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#include <asm/mach-ath79/ath79.h>
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#include "dev-ap9x-pci.h"
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#include "dev-eth.h"
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#include "dev-gpio-buttons.h"
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#include "dev-leds-gpio.h"
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#include "dev-m25p80.h"
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#include "dev-usb.h"
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#include "machtypes.h"
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#define AP96_GPIO_LED_12_GREEN 0
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#define AP96_GPIO_LED_3_GREEN 1
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#define AP96_GPIO_LED_2_GREEN 2
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#define AP96_GPIO_LED_WPS_GREEN 4
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#define AP96_GPIO_LED_5_GREEN 5
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#define AP96_GPIO_LED_4_ORANGE 6
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/* Reset button - next to the power connector */
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#define AP96_GPIO_BTN_RESET 3
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/* WPS button - next to a led on right */
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#define AP96_GPIO_BTN_WPS 8
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#define AP96_KEYS_POLL_INTERVAL 20 /* msecs */
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#define AP96_KEYS_DEBOUNCE_INTERVAL (3 * AP96_KEYS_POLL_INTERVAL)
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#define AP96_WMAC0_MAC_OFFSET 0x120c
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#define AP96_WMAC1_MAC_OFFSET 0x520c
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#define AP96_CALDATA0_OFFSET 0x1000
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#define AP96_CALDATA1_OFFSET 0x5000
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static struct mtd_partition ap96_partitions[] = {
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{
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.name = "uboot",
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.offset = 0,
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.size = 0x030000,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "env",
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.offset = 0x030000,
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.size = 0x010000,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "rootfs",
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.offset = 0x040000,
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.size = 0x600000,
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}, {
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.name = "uImage",
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.offset = 0x640000,
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.size = 0x1b0000,
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}, {
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.name = "caldata",
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.offset = 0x7f0000,
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.size = 0x010000,
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.mask_flags = MTD_WRITEABLE,
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}
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};
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static struct flash_platform_data ap96_flash_data = {
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.parts = ap96_partitions,
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.nr_parts = ARRAY_SIZE(ap96_partitions),
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};
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/*
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* AP96 has 12 unlabeled leds in the front; these are numbered from 1 to 12
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* below (from left to right on the board). Led 1 seems to be on whenever the
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* board is powered. Led 11 shows LAN link activity actity. Led 3 is orange;
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* others are green.
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*
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* In addition, there is one led next to a button on the right side for WPS.
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*/
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static struct gpio_led ap96_leds_gpio[] __initdata = {
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{
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.name = "ap96:green:led2",
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.gpio = AP96_GPIO_LED_2_GREEN,
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.active_low = 1,
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}, {
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.name = "ap96:green:led3",
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.gpio = AP96_GPIO_LED_3_GREEN,
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.active_low = 1,
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}, {
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.name = "ap96:orange:led4",
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.gpio = AP96_GPIO_LED_4_ORANGE,
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.active_low = 1,
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}, {
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.name = "ap96:green:led5",
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.gpio = AP96_GPIO_LED_5_GREEN,
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.active_low = 1,
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}, {
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.name = "ap96:green:led12",
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.gpio = AP96_GPIO_LED_12_GREEN,
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.active_low = 1,
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}, { /* next to a button on right */
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.name = "ap96:green:wps",
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.gpio = AP96_GPIO_LED_WPS_GREEN,
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.active_low = 1,
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}
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};
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static struct gpio_keys_button ap96_gpio_keys[] __initdata = {
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{
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.desc = "reset",
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.type = EV_KEY,
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.code = KEY_RESTART,
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.debounce_interval = AP96_KEYS_DEBOUNCE_INTERVAL,
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.gpio = AP96_GPIO_BTN_RESET,
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.active_low = 1,
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}, {
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.desc = "wps",
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.type = EV_KEY,
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.code = KEY_WPS_BUTTON,
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.debounce_interval = AP96_KEYS_DEBOUNCE_INTERVAL,
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.gpio = AP96_GPIO_BTN_WPS,
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.active_low = 1,
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}
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};
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#define AP96_WAN_PHYMASK 0x10
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#define AP96_LAN_PHYMASK 0x0f
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static void __init ap96_setup(void)
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{
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u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
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ath79_register_mdio(0, ~(AP96_WAN_PHYMASK | AP96_LAN_PHYMASK));
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ath79_init_mac(ath79_eth0_data.mac_addr, art, 0);
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ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
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ath79_eth0_data.phy_mask = AP96_LAN_PHYMASK;
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ath79_eth0_data.speed = SPEED_1000;
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ath79_eth0_data.duplex = DUPLEX_FULL;
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ath79_register_eth(0);
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ath79_init_mac(ath79_eth1_data.mac_addr, art, 1);
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ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
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ath79_eth1_data.phy_mask = AP96_WAN_PHYMASK;
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ath79_eth1_pll_data.pll_1000 = 0x1f000000;
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ath79_register_eth(1);
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ath79_register_usb();
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ath79_register_m25p80(&ap96_flash_data);
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ath79_register_leds_gpio(-1, ARRAY_SIZE(ap96_leds_gpio),
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ap96_leds_gpio);
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ath79_register_gpio_keys_polled(-1, AP96_KEYS_POLL_INTERVAL,
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ARRAY_SIZE(ap96_gpio_keys),
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ap96_gpio_keys);
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ap94_pci_init(art + AP96_CALDATA0_OFFSET,
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art + AP96_WMAC0_MAC_OFFSET,
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art + AP96_CALDATA1_OFFSET,
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art + AP96_WMAC1_MAC_OFFSET);
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}
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MIPS_MACHINE(ATH79_MACH_AP96, "AP96", "Atheros AP96", ap96_setup);
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