22c5f96c6b
Some u-boot versions for QCA955x change the delays based on the link speed during boot. This usually breaks the support of other linkspeeds when OpenWrt is booted. It also conflicts with the at803x_platform_data::fixup_rgmii_tx_delay. OpenWrt has to set its own values in QCA955X_GMAC_REG_ETH_CFG. The default RGMII values from the Atheros u-boot are currently used to preset the existing mach files. These may have to be adjusted for boards using different values but which are not currently set them explicitely in OpenWrt. Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com> Cc: Gabor Juhos <juhosg@openwrt.org> Cc: Imre Kaloz <kaloz@openwrt.org> Cc: Christian Beier <cb@shoutrlabs.com> Cc: Chris R Blake <chrisrblake93@gmail.com> Cc: Benjamin Berg <benjamin@sipsolutions.net> Cc: Heiner Kallweit <hkallweit1@gmail.com> Cc: Cezary Jackiewicz <cezary.jackiewicz@gmail.com> Cc: Matthias Schiffer <mschiffer@universe-factory.net> Cc: Dirk Neukirchen <dirkneukirchen@web.de> Cc: Christian Mehlis <christian@m3hlis.de> Cc: Luka Perkov <luka@openwrt.org> Cc: Felix Fietkau <nbd@openwrt.org> SVN-Revision: 49029
177 lines
4.6 KiB
C
177 lines
4.6 KiB
C
/*
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* Compex WPJ558 board support
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*
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* Copyright (c) 2012 Qualcomm Atheros
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* Copyright (c) 2012-2013 Gabor Juhos <juhosg@openwrt.org>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#include <linux/pci.h>
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#include <linux/phy.h>
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#include <linux/gpio.h>
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#include <linux/platform_device.h>
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#include <linux/ath9k_platform.h>
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#include <linux/ar8216_platform.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include "common.h"
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#include "pci.h"
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#include "dev-ap9x-pci.h"
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#include "dev-gpio-buttons.h"
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#include "dev-eth.h"
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#include "dev-usb.h"
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#include "dev-leds-gpio.h"
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#include "dev-m25p80.h"
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#include "dev-spi.h"
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#include "dev-wmac.h"
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#include "machtypes.h"
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#define WPJ558_GPIO_LED_SIG1 14
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#define WPJ558_GPIO_LED_SIG2 15
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#define WPJ558_GPIO_LED_SIG3 22
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#define WPJ558_GPIO_LED_SIG4 23
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#define WPJ558_GPIO_BUZZER 4
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#define WPJ558_GPIO_BTN_RESET 17
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#define WPJ558_KEYS_POLL_INTERVAL 20 /* msecs */
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#define WPJ558_KEYS_DEBOUNCE_INTERVAL (3 * WPJ558_KEYS_POLL_INTERVAL)
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#define WPJ558_MAC_OFFSET 0x1002
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#define WPJ558_WMAC_CALDATA_OFFSET 0x1000
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static struct gpio_led wpj558_leds_gpio[] __initdata = {
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{
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.name = "wpj558:red:sig1",
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.gpio = WPJ558_GPIO_LED_SIG1,
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.active_low = 1,
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},
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{
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.name = "wpj558:yellow:sig2",
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.gpio = WPJ558_GPIO_LED_SIG2,
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.active_low = 1,
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},
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{
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.name = "wpj558:green:sig3",
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.gpio = WPJ558_GPIO_LED_SIG3,
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.active_low = 1,
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},
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{
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.name = "wpj558:green:sig4",
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.gpio = WPJ558_GPIO_LED_SIG4,
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.active_low = 1,
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},
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{
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.name = "wpj558:buzzer",
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.gpio = WPJ558_GPIO_BUZZER,
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.active_low = 0,
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}
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};
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static struct gpio_keys_button wpj558_gpio_keys[] __initdata = {
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{
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.desc = "reset",
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.type = EV_KEY,
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.code = KEY_RESTART,
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.debounce_interval = WPJ558_KEYS_DEBOUNCE_INTERVAL,
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.gpio = WPJ558_GPIO_BTN_RESET,
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.active_low = 1,
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},
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};
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static struct ar8327_pad_cfg wpj558_ar8327_pad0_cfg = {
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.mode = AR8327_PAD_MAC_SGMII,
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.sgmii_delay_en = true,
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};
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static struct ar8327_pad_cfg wpj558_ar8327_pad6_cfg = {
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.mode = AR8327_PAD_MAC_RGMII,
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.txclk_delay_en = true,
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.rxclk_delay_en = true,
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.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
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.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
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};
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static struct ar8327_platform_data wpj558_ar8327_data = {
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.pad0_cfg = &wpj558_ar8327_pad0_cfg,
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.pad6_cfg = &wpj558_ar8327_pad6_cfg,
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.port0_cfg = {
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.force_link = 1,
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.speed = AR8327_PORT_SPEED_1000,
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.duplex = 1,
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.txpause = 1,
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.rxpause = 1,
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},
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.port6_cfg = {
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.force_link = 1,
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.speed = AR8327_PORT_SPEED_1000,
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.duplex = 1,
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.txpause = 1,
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.rxpause = 1,
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},
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};
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static struct mdio_board_info wpj558_mdio0_info[] = {
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{
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.bus_id = "ag71xx-mdio.0",
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.phy_addr = 0,
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.platform_data = &wpj558_ar8327_data,
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},
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};
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static void __init wpj558_setup(void)
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{
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u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
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ath79_register_m25p80(NULL);
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ath79_register_leds_gpio(-1, ARRAY_SIZE(wpj558_leds_gpio),
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wpj558_leds_gpio);
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ath79_register_gpio_keys_polled(-1, WPJ558_KEYS_POLL_INTERVAL,
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ARRAY_SIZE(wpj558_gpio_keys),
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wpj558_gpio_keys);
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ath79_register_usb();
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ath79_register_wmac(art + WPJ558_WMAC_CALDATA_OFFSET, NULL);
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ath79_register_pci();
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mdiobus_register_board_info(wpj558_mdio0_info,
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ARRAY_SIZE(wpj558_mdio0_info));
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ath79_register_mdio(0, 0x0);
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ath79_init_mac(ath79_eth0_data.mac_addr, art + WPJ558_MAC_OFFSET, 0);
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ath79_init_mac(ath79_eth1_data.mac_addr, art + WPJ558_MAC_OFFSET, 0);
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ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0);
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/* GMAC0 is connected to an AR8327 switch */
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ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
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ath79_eth0_data.phy_mask = BIT(0);
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ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
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ath79_eth0_pll_data.pll_1000 = 0x56000000;
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/* GMAC1 is connected to the SGMII interface */
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ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
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ath79_eth1_data.speed = SPEED_1000;
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ath79_eth1_data.duplex = DUPLEX_FULL;
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ath79_eth1_pll_data.pll_1000 = 0x03000101;
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ath79_register_eth(0);
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ath79_register_eth(1);
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}
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MIPS_MACHINE(ATH79_MACH_WPJ558, "WPJ558", "Compex WPJ558", wpj558_setup);
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