0cda4af005
Refreshed all patches. Added new patch: - 192-Revert-ubifs-xattr-Don-t-operate-on-deleted-inodes.patch This fixes a bug introduced in upstream 4.14.68 which caused targets using ubifs to produce file-system errors on boot, rendering them useless. Compile-tested on: cns3xxx, imx6, x86_64 Runtime-tested on: cns3xxx, imx6, x86_64 Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
73 lines
2.3 KiB
Diff
73 lines
2.3 KiB
Diff
From 1a990fefb641398fb580a0ea0be99b0ff27cbb9b Mon Sep 17 00:00:00 2001
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From: Baruch Siach <baruch@tkos.co.il>
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Date: Thu, 21 Jun 2018 20:40:23 +0300
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Subject: [PATCH] rtc: armada38x: reset after rtc power loss
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When the RTC block looses power it needs a reset sequence to make it
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usable again. Otherwise, writes to the time register have no effect.
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This reset sequence combines information from the mvebu_rtc driver in
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the Marvell provided U-Boot, and the SolidRun provided U-Boot repo.
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Tested on the Armada 388 based SolidRun Clearfog Base.
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Signed-off-by: Baruch Siach <baruch@tkos.co.il>
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Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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---
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drivers/rtc/rtc-armada38x.c | 23 +++++++++++++++++++++++
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1 file changed, 23 insertions(+)
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--- a/drivers/rtc/rtc-armada38x.c
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+++ b/drivers/rtc/rtc-armada38x.c
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@@ -30,6 +30,8 @@
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#define RTC_IRQ_FREQ_1HZ BIT(2)
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#define RTC_CCR 0x18
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#define RTC_CCR_MODE BIT(15)
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+#define RTC_CONF_TEST 0x1C
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+#define RTC_NOMINAL_TIMING BIT(13)
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#define RTC_TIME 0xC
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#define RTC_ALARM1 0x10
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@@ -75,6 +77,7 @@ struct armada38x_rtc {
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void __iomem *regs_soc;
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spinlock_t lock;
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int irq;
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+ bool initialized;
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struct value_to_freq *val_to_freq;
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struct armada38x_rtc_data *data;
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};
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@@ -226,6 +229,23 @@ static int armada38x_rtc_read_time(struc
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return 0;
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}
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+static void armada38x_rtc_reset(struct armada38x_rtc *rtc)
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+{
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+ u32 reg;
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+
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+ reg = rtc->data->read_rtc_reg(rtc, RTC_CONF_TEST);
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+ /* If bits [7:0] are non-zero, assume RTC was uninitialized */
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+ if (reg & 0xff) {
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+ rtc_delayed_write(0, rtc, RTC_CONF_TEST);
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+ msleep(500); /* Oscillator startup time */
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+ rtc_delayed_write(0, rtc, RTC_TIME);
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+ rtc_delayed_write(SOC_RTC_ALARM1 | SOC_RTC_ALARM2, rtc,
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+ RTC_STATUS);
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+ rtc_delayed_write(RTC_NOMINAL_TIMING, rtc, RTC_CCR);
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+ }
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+ rtc->initialized = true;
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+}
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+
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static int armada38x_rtc_set_time(struct device *dev, struct rtc_time *tm)
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{
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struct armada38x_rtc *rtc = dev_get_drvdata(dev);
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@@ -237,6 +257,9 @@ static int armada38x_rtc_set_time(struct
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if (ret)
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goto out;
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+ if (!rtc->initialized)
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+ armada38x_rtc_reset(rtc);
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+
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spin_lock_irqsave(&rtc->lock, flags);
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rtc_delayed_write(time, rtc, RTC_TIME);
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spin_unlock_irqrestore(&rtc->lock, flags);
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