c2d50bdeb3
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com> Signed-off-by: John Crispin <john@phrozen.org>
224 lines
5.8 KiB
Diff
224 lines
5.8 KiB
Diff
From ec3e465ecf3f7dd26f2e22170e4c5f4b9979df5d Mon Sep 17 00:00:00 2001
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From: Matthew McClintock <mmcclint@codeaurora.org>
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Date: Mon, 21 Mar 2016 15:55:21 -0500
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Subject: [PATCH 26/69] dts: ipq4019: Add support for IPQ4019 DK04 board
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This is pretty similiar to a DK01 but has a bit more IO. Some notable
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differences are listed below however they are not in the device tree yet
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as we continue adding more support
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- second serial port
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- PCIe
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- NAND
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- SD/EMMC
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Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
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---
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arch/arm/boot/dts/Makefile | 1 +
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arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 12 +-
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arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts | 21 +++
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arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi | 163 ++++++++++++++++++++++++
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4 files changed, 189 insertions(+), 8 deletions(-)
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create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts
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create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
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--- a/arch/arm/boot/dts/Makefile
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+++ b/arch/arm/boot/dts/Makefile
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@@ -617,6 +617,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
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qcom-apq8084-ifc6540.dtb \
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qcom-apq8084-mtp.dtb \
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qcom-ipq4019-ap.dk01.1-c1.dtb \
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+ qcom-ipq4019-ap.dk04.1-c1.dtb \
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qcom-ipq8064-ap148.dtb \
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qcom-msm8660-surf.dtb \
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qcom-msm8960-cdp.dtb \
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--- /dev/null
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+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts
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@@ -0,0 +1,21 @@
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+/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
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+ *
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+ * Permission to use, copy, modify, and/or distribute this software for any
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+ * purpose with or without fee is hereby granted, provided that the above
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+ * copyright notice and this permission notice appear in all copies.
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+ *
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+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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+ *
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+ */
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+
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+#include "qcom-ipq4019-ap.dk04.1.dtsi"
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+
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+/ {
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+ model = "Qualcomm Technologies, Inc. IPQ40xx/AP-DK04.1-C1";
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+};
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--- /dev/null
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+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
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@@ -0,0 +1,163 @@
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+/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
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+ *
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+ * Permission to use, copy, modify, and/or distribute this software for any
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+ * purpose with or without fee is hereby granted, provided that the above
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+ * copyright notice and this permission notice appear in all copies.
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+ *
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+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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+ *
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+ */
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+
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+#include "qcom-ipq4019.dtsi"
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+
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+/ {
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+ model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1";
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+ compatible = "qcom,ipq4019";
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+
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+ clocks {
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+ xo: xo {
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+ compatible = "fixed-clock";
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+ clock-frequency = <48000000>;
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+ #clock-cells = <0>;
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+ };
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+ };
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+
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+ soc {
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+ timer {
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+ compatible = "arm,armv7-timer";
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+ interrupts = <1 2 0xf08>,
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+ <1 3 0xf08>,
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+ <1 4 0xf08>,
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+ <1 1 0xf08>;
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+ clock-frequency = <48000000>;
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+ };
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+
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+ pinctrl@0x01000000 {
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+ serial_0_pins: serial_pinmux {
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+ mux {
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+ pins = "gpio16", "gpio17";
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+ function = "blsp_uart0";
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+ bias-disable;
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+ };
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+ };
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+
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+ serial_1_pins: serial1_pinmux {
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+ mux {
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+ pins = "gpio8", "gpio9";
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+ function = "blsp_uart1";
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+ bias-disable;
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+ };
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+ };
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+
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+ spi_0_pins: spi_0_pinmux {
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+ pinmux {
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+ function = "blsp_spi0";
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+ pins = "gpio13", "gpio14", "gpio15";
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+ };
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+ pinmux_cs {
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+ function = "gpio";
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+ pins = "gpio12";
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+ };
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+ pinconf {
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+ pins = "gpio13", "gpio14", "gpio15";
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+ drive-strength = <12>;
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+ bias-disable;
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+ };
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+ pinconf_cs {
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+ pins = "gpio12";
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+ drive-strength = <2>;
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+ bias-disable;
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+ output-high;
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+ };
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+ };
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+
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+ i2c_0_pins: i2c_0_pinmux {
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+ pinmux {
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+ function = "blsp_i2c0";
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+ pins = "gpio10", "gpio11";
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+ };
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+ pinconf {
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+ pins = "gpio10", "gpio11";
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+ drive-strength = <16>;
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+ bias-disable;
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+ };
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+ };
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+ };
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+
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+ blsp_dma: dma@7884000 {
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+ status = "ok";
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+ };
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+
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+ spi_0: spi@78b5000 {
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+ pinctrl-0 = <&spi_0_pins>;
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+ pinctrl-names = "default";
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+ status = "ok";
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+ cs-gpios = <&tlmm 12 0>;
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+
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+ mx25l25635e@0 {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ reg = <0>;
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+ compatible = "mx25l25635e";
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+ spi-max-frequency = <24000000>;
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+ };
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+ };
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+
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+ i2c_0: i2c@78b7000 { /* BLSP1 QUP2 */
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+ pinctrl-0 = <&i2c_0_pins>;
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+ pinctrl-names = "default";
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+
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+ status = "ok";
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+ };
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+
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+ serial@78af000 {
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+ pinctrl-0 = <&serial_0_pins>;
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+ pinctrl-names = "default";
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+ status = "ok";
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+ };
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+
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+ serial@78b0000 {
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+ pinctrl-0 = <&serial_1_pins>;
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+ pinctrl-names = "default";
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+ status = "ok";
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+ };
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+
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+ usb3_ss_phy: ssphy@9a000 {
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+ status = "ok";
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+ };
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+
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+ usb3_hs_phy: hsphy@a6000 {
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+ status = "ok";
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+ };
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+
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+ usb3: usb3@8af8800 {
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+ status = "ok";
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+ };
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+
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+ usb2_hs_phy: hsphy@a8000 {
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+ status = "ok";
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+ };
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+
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+ usb2: usb2@60f8800 {
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+ status = "ok";
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+ };
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+
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+ cryptobam: dma@8e04000 {
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+ status = "ok";
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+ };
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+
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+ crypto@8e3a000 {
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+ status = "ok";
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+ };
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+
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+ watchdog@b017000 {
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+ status = "ok";
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+ };
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+ };
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+};
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