3b88f74bbe
This backports some more patches from kernel 4.11 adding more devices to the device tree of the A64 SoC. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
52 lines
1.5 KiB
Diff
52 lines
1.5 KiB
Diff
From 791a9e001d3ba3b552888b0bf3c592a50b71f57e Mon Sep 17 00:00:00 2001
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From: Icenowy Zheng <icenowy@aosc.xyz>
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Date: Tue, 4 Apr 2017 17:50:58 +0800
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Subject: arm64: allwinner: a64: add r_ccu node
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A64 SoC have a CCU (r_ccu) in PRCM block.
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Add the device node for it.
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The mux 3 of R_CCU is an internal oscillator, which is 16MHz according
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to the user manual, and has only 30% accuracy based on our experience
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on older SoCs. The real mesaured value of it on two Pine64 boards is
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around 11MHz, which is around 70% of 16MHz.
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Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
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Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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---
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arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 17 +++++++++++++++++
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1 file changed, 17 insertions(+)
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--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
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@@ -98,6 +98,14 @@
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clock-output-names = "osc32k";
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};
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+ iosc: internal-osc-clk {
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+ #clock-cells = <0>;
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+ compatible = "fixed-clock";
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+ clock-frequency = <16000000>;
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+ clock-accuracy = <300000000>;
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+ clock-output-names = "iosc";
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+ };
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+
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psci {
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compatible = "arm,psci-0.2";
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method = "smc";
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@@ -389,5 +397,14 @@
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interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
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};
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+
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+ r_ccu: clock@1f01400 {
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+ compatible = "allwinner,sun50i-a64-r-ccu";
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+ reg = <0x01f01400 0x100>;
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+ clocks = <&osc24M>, <&osc32k>, <&iosc>;
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+ clock-names = "hosc", "losc", "iosc";
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+ #clock-cells = <1>;
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+ #reset-cells = <1>;
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+ };
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};
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};
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