openwrtv3/package/boot/uboot-layerscape/patches/0033-mmc-fsl_esdhc-support-two-esdhc-host-controllers.patch
Yutang Jiang 15a14cf166 layerscape: add 64b/32b target for ls1012ardb device
The QorIQ LS1012A processor, optimized for battery-backed or
USB-powered, integrates a single ARM Cortex-A53 core with a hardware
packet forwarding engine and high-speed interfaces to deliver
line-rate networking performance.
QorIQ LS1012A Reference Design System (LS1012ARDB) is a high-performance
development platform, with a complete debugging environment.
The LS1012ARDB board supports the QorIQ LS1012A processor and is
optimized to support the high-bandwidth DDR3L memory and
a full complement of high-speed SerDes ports.

LEDE/OPENWRT will auto strip executable program file while make. So we
need select CONFIG_NO_STRIP=y while make menuconfig to avoid the ppfe network
fiemware be destroyed, then run make to build ls1012ardb firmware.

The fsl-quadspi flash with jffs2 fs is unstable and arise some failed message.
This issue have noticed the IP owner for investigate, hope he can solve it
earlier. So the ls1012ardb now also provide a xx-firmware.ext4.bin as default
firmware, and the uboot bootcmd will run wrtboot_ext4rfs for "rootfstype=ext4"
bootargs.

Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>
2016-10-31 17:00:10 +01:00

47 lines
1.4 KiB
Diff

From 2daf451df50209e7626c2bf424d50ff23055784a Mon Sep 17 00:00:00 2001
From: Yangbo Lu <yangbo.lu@nxp.com>
Date: Wed, 18 May 2016 10:52:38 +0800
Subject: [PATCH 33/93] mmc: fsl_esdhc: support two esdhc host controllers
This patch is to support two esdhc host controllers with
the macro CONFIG_FSL_ESDHC_TWO_CONTROLLERS_SUPPORT.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
---
drivers/mmc/fsl_esdhc.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 7cc61a0..cacf879 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -748,11 +748,26 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
int fsl_esdhc_mmc_init(bd_t *bis)
{
struct fsl_esdhc_cfg *cfg;
+#ifdef CONFIG_FSL_ESDHC_TWO_CONTROLLERS_SUPPORT
+ struct fsl_esdhc_cfg *cfg_1;
+#endif
cfg = calloc(sizeof(struct fsl_esdhc_cfg), 1);
cfg->esdhc_base = CONFIG_SYS_FSL_ESDHC_ADDR;
cfg->sdhc_clk = gd->arch.sdhc_clk;
+#ifdef CONFIG_FSL_ESDHC_TWO_CONTROLLERS_SUPPORT
+ cfg_1 = calloc(sizeof(struct fsl_esdhc_cfg), 1);
+ cfg_1->esdhc_base = CONFIG_SYS_FSL_ESDHC_1_ADDR;
+ cfg_1->sdhc_clk = gd->arch.sdhc_clk;
+
+ if (fsl_esdhc_initialize(bis, cfg))
+ return -1;
+ if (fsl_esdhc_initialize(bis, cfg_1))
+ return -1;
+ return 0;
+#else
return fsl_esdhc_initialize(bis, cfg);
+#endif
}
#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
--
1.7.9.5