f1d0eba3ea
Fix a typo in mt7621.dtsi compatible string. Disable spi, sdhci and pci in mt7621.dtsi and enable the nodes in the indiviual board dts files. The nodes require further device specific configuration anyway. Remove the m25p80@0 spi child node from mt7621.dtsi and add the chunked-io parameter to the individual board dts files. Fix the spi flash compatible string for the WNDR3700V5. Drop the mt7621-eval-board compatible string for all boards which are not the eval board. Drop the linux,modalias parameter from spi flash node. Remove the xhci node from board files, it is already enabled in dtsi. Disable xhci for boards not having usb ports populated. Signed-off-by: Mathias Kresin <dev@kresin.me>
116 lines
1.7 KiB
Text
116 lines
1.7 KiB
Text
#include "mt7621.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x1c000000>, <0x20000000 0x4000000>;
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};
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chosen {
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bootargs = "console=ttyS0,115200";
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};
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palmbus: palmbus@1E000000 {
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i2c@900 {
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status = "okay";
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};
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};
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gpio-keys-polled {
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compatible = "gpio-keys-polled";
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#address-cells = <1>;
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#size-cells = <0>;
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poll-interval = <20>;
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reset {
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label = "reset";
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gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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status_led: status {
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gpios = <&gpio0 24 1>;
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};
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};
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};
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&sdhci {
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status = "okay";
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};
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&spi0 {
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status = "okay";
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m25p80@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <10000000>;
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m25p,chunked-io = <32>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x30000>;
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read-only;
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};
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partition@30000 {
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label = "u-boot-env";
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reg = <0x30000 0x10000>;
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read-only;
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};
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factory: partition@40000 {
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label = "factory";
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reg = <0x40000 0x10000>;
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read-only;
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};
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firmware: partition@50000 {
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label = "firmware";
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};
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};
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};
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&pcie {
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status = "okay";
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pcie0 {
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wifi@14c3,7603 {
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compatible = "pci14c3,7603";
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&factory 0x0000>;
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mediatek,5ghz = <0>;
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};
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};
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pcie1 {
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wifi@14c3,7662 {
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compatible = "pci14c3,7662";
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&factory 0x8000>;
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mediatek,2ghz = <0>;
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};
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};
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};
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ðernet {
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mtd-mac-address = <&factory 0xe000>;
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};
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&pinctrl {
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state_default: pinctrl0 {
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gpio {
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ralink,group = "wdt", "rgmii2", "wdt rst", "jtag", "mdio";
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ralink,function = "gpio";
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};
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};
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};
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