7bbf4117c6
This add support for kernel 4.9 to the ar71xx target. It was compile tested with the generic, NAND and mikrotik subtarget. Multiple members of the community tested it on their boards and did not report any major problem so far. Especially the NAND part received some changes to adapt to the new kernel APIs. The serial driver hack used for the Arduino Yun was not ported because the kernel changed there a lot. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
92 lines
2.5 KiB
Diff
92 lines
2.5 KiB
Diff
--- /dev/null
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+++ b/arch/mips/ath79/gpio.c
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@@ -0,0 +1,59 @@
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+/*
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+ * Atheros AR71XX/AR724X/AR913X GPIO API support
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+ *
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+ * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
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+ * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
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+ * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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+ *
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+ * Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP
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+ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License version 2 as published
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+ * by the Free Software Foundation.
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+ */
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+#include <linux/kernel.h>
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+#include <linux/module.h>
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+#include <linux/io.h>
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+#include <linux/gpio.h>
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+#include <asm/mach-ath79/ar71xx_regs.h>
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+#include <asm/mach-ath79/ath79.h>
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+#include "common.h"
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+
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+void __iomem *ath79_gpio_base;
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+EXPORT_SYMBOL_GPL(ath79_gpio_base);
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+
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+static void __iomem *ath79_gpio_get_function_reg(void)
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+{
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+ u32 reg = 0;
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+
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+ if (soc_is_ar71xx() ||
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+ soc_is_ar724x() ||
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+ soc_is_ar913x() ||
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+ soc_is_ar933x())
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+ reg = AR71XX_GPIO_REG_FUNC;
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+ else if (soc_is_ar934x())
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+ reg = AR934X_GPIO_REG_FUNC;
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+ else
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+ BUG();
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+
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+ return ath79_gpio_base + reg;
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+}
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+
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+void ath79_gpio_function_setup(u32 set, u32 clear)
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+{
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+ void __iomem *reg = ath79_gpio_get_function_reg();
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+
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+ __raw_writel((__raw_readl(reg) & ~clear) | set, reg);
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+ /* flush write */
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+ __raw_readl(reg);
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+}
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+
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+void ath79_gpio_function_enable(u32 mask)
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+{
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+ ath79_gpio_function_setup(mask, 0);
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+}
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+
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+void ath79_gpio_function_disable(u32 mask)
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+{
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+ ath79_gpio_function_setup(0, mask);
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+}
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--- a/arch/mips/include/asm/mach-ath79/ath79.h
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+++ b/arch/mips/include/asm/mach-ath79/ath79.h
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@@ -118,6 +118,7 @@ static inline int soc_is_qca955x(void)
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void ath79_ddr_wb_flush(unsigned int reg);
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void ath79_ddr_set_pci_windows(void);
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+extern void __iomem *ath79_gpio_base;
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extern void __iomem *ath79_pll_base;
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extern void __iomem *ath79_reset_base;
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--- a/arch/mips/ath79/dev-common.c
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+++ b/arch/mips/ath79/dev-common.c
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@@ -156,4 +156,5 @@ void __init ath79_gpio_init(void)
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}
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platform_device_register(&ath79_gpio_device);
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+ ath79_gpio_base = ioremap(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE);
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}
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--- a/arch/mips/ath79/common.h
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+++ b/arch/mips/ath79/common.h
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@@ -24,6 +24,9 @@ unsigned long ath79_get_sys_clk_rate(con
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void ath79_ddr_ctrl_init(void);
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+void ath79_gpio_function_enable(u32 mask);
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+void ath79_gpio_function_disable(u32 mask);
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+void ath79_gpio_function_setup(u32 set, u32 clear);
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void ath79_gpio_init(void);
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#endif /* __ATH79_COMMON_H */
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