openwrtv3/package/broadcom-57xx/src/sbgige.h
Felix Fietkau ddd809f9e5 (6/6) bcm57xx: package
This is the bcm57xx package.  I have tested default vlan functions,
but I dont have the equipment to test more advanced setups.  The default
vlan setup seems to be working fine.  I also added the activate_gpio
parameter which will make the driver activate the switch via gpio before
probing for it.

I'm not sure which method is best for autoload.  For the wrt350n, I
need the activate_gpio parameter.  But its probably not a good idea
to add that to the autoload file.  On a system without a bcm57xx switch,
isn't it a bad idea to mess with the gpios looking for the switch? Ideally,
wouldn't it be best to load the bcm57xx module from broadcom-diag, after
it has determined which router its on?  I tried using 'request_module' from
there, but had no success.  For now, I am relying on preinit to load
the bcm57xx module with activate_gpio param, after it has failed to load
switch_robo and switch_adm.

Signed-off-by: Ben Pfountz <netprince (at) vt (dot) edu>

SVN-Revision: 11471
2008-06-15 11:11:28 +00:00

59 lines
1.4 KiB
C

/*
* HND SiliconBackplane Gigabit Ethernet core registers
*
* Copyright 2007, Broadcom Corporation
* All Rights Reserved.
*
* THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
* KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
* SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
*
* $Id: sbgige.h,v 1.5 2007/06/01 05:58:20 michael Exp $
*/
#ifndef _sbgige_h_
#define _sbgige_h_
#include <typedefs.h>
#include <sbconfig.h>
#include <pcicfg.h>
/* cpp contortions to concatenate w/arg prescan */
#ifndef PAD
#define _PADLINE(line) pad ## line
#define _XSTR(line) _PADLINE(line)
#define PAD _XSTR(__LINE__)
#endif /* PAD */
/* PCI to OCP shim registers */
typedef volatile struct {
uint32 FlushStatusControl;
uint32 FlushReadAddr;
uint32 FlushTimeoutCntr;
uint32 BarrierReg;
uint32 MaocpSIControl;
uint32 SiocpMaControl;
uint8 PAD[0x02E8];
} sbgige_pcishim_t;
/* SB core registers */
typedef volatile struct {
/* PCI I/O Read/Write registers */
uint8 pciio[0x0400];
/* Reserved */
uint8 reserved[0x0400];
/* PCI configuration registers */
pci_config_regs pcicfg;
uint8 PAD[0x0300];
/* PCI to OCP shim registers */
sbgige_pcishim_t pcishim;
/* Sonics SiliconBackplane registers */
sbconfig_t sbconfig;
} sbgige_t;
#endif /* _sbgige_h_ */