6cd41b419c
Refreshed all patches. Compile-tested on: cns3xxx, imx6 Runtime-tested on: cns3xxx, imx6 Fixes for CVEs: CVE-2018-1108 CVE-2018-1092 CVE-2018-1094 CVE-2018-1095 Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com> Tested-by: Stijn Segers <foss@volatilesystems.org>
51 lines
1.6 KiB
Diff
51 lines
1.6 KiB
Diff
--- a/drivers/spi/Kconfig
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+++ b/drivers/spi/Kconfig
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@@ -206,6 +206,13 @@ config SPI_CLPS711X
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This enables dedicated general purpose SPI/Microwire1-compatible
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master mode interface (SSI1) for CLPS711X-based CPUs.
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+config SPI_CNS3XXX
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+ tristate "CNS3XXX SPI controller"
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+ depends on ARCH_CNS3XXX && SPI_MASTER
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+ select SPI_BITBANG
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+ help
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+ This enables using the CNS3XXX SPI controller in master mode.
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+
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config SPI_COLDFIRE_QSPI
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tristate "Freescale Coldfire QSPI controller"
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depends on (M520x || M523x || M5249 || M525x || M527x || M528x || M532x)
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--- a/drivers/spi/Makefile
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+++ b/drivers/spi/Makefile
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@@ -31,6 +31,7 @@ obj-$(CONFIG_SPI_BITBANG) += spi-bitban
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obj-$(CONFIG_SPI_BUTTERFLY) += spi-butterfly.o
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obj-$(CONFIG_SPI_CADENCE) += spi-cadence.o
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obj-$(CONFIG_SPI_CLPS711X) += spi-clps711x.o
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+obj-$(CONFIG_SPI_CNS3XXX) += spi-cns3xxx.o
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obj-$(CONFIG_SPI_COLDFIRE_QSPI) += spi-coldfire-qspi.o
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obj-$(CONFIG_SPI_DAVINCI) += spi-davinci.o
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obj-$(CONFIG_SPI_DLN2) += spi-dln2.o
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--- a/include/linux/spi/spi.h
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+++ b/include/linux/spi/spi.h
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@@ -799,6 +799,10 @@ struct spi_transfer {
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u32 speed_hz;
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struct list_head transfer_list;
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+
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+#ifdef CONFIG_ARCH_CNS3XXX
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+ unsigned last_in_message_list;
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+#endif
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};
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/**
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--- a/drivers/spi/spi.c
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+++ b/drivers/spi/spi.c
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@@ -1027,6 +1027,9 @@ static int spi_transfer_one_message(stru
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list_for_each_entry(xfer, &msg->transfers, transfer_list) {
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trace_spi_transfer_start(msg, xfer);
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+ xfer->last_in_message_list =
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+ list_is_last(&xfer->transfer_list, &msg->transfers);
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+
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spi_statistics_add_transfer_stats(statm, xfer, ctlr);
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spi_statistics_add_transfer_stats(stats, xfer, ctlr);
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