122 lines
3.3 KiB
Diff
122 lines
3.3 KiB
Diff
From 915340f70c0594d1f0717fee3eb678fa71206509 Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Wed, 20 Jan 2016 05:27:17 +0100
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Subject: [PATCH 33/81] soc: mediatek: PMIC wrap: add wrapper callbacks for
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init_reg_clock
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Split init_reg_clock up into SoC specific callbacks. The patch also
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reorders the code to avoid the need for callback function prototypes.
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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drivers/soc/mediatek/mtk-pmic-wrap.c | 70 ++++++++++++++++++----------------
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1 file changed, 38 insertions(+), 32 deletions(-)
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--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
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+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
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@@ -354,24 +354,6 @@ enum pwrap_type {
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PWRAP_MT8173,
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};
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-struct pmic_wrapper_type {
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- int *regs;
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- enum pwrap_type type;
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- u32 arb_en_all;
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-};
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-
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-static struct pmic_wrapper_type pwrap_mt8135 = {
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- .regs = mt8135_regs,
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- .type = PWRAP_MT8135,
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- .arb_en_all = 0x1ff,
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-};
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-
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-static struct pmic_wrapper_type pwrap_mt8173 = {
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- .regs = mt8173_regs,
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- .type = PWRAP_MT8173,
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- .arb_en_all = 0x3f,
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-};
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-
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struct pmic_wrapper {
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struct device *dev;
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void __iomem *base;
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@@ -385,6 +367,13 @@ struct pmic_wrapper {
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void __iomem *bridge_base;
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};
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+struct pmic_wrapper_type {
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+ int *regs;
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+ enum pwrap_type type;
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+ u32 arb_en_all;
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+ int (*init_reg_clock)(struct pmic_wrapper *wrp);
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+};
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+
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static inline int pwrap_is_mt8135(struct pmic_wrapper *wrp)
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{
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return wrp->master->type == PWRAP_MT8135;
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@@ -578,20 +567,23 @@ static int pwrap_init_sidly(struct pmic_
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return 0;
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}
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-static int pwrap_init_reg_clock(struct pmic_wrapper *wrp)
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+static int pwrap_mt8135_init_reg_clock(struct pmic_wrapper *wrp)
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{
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- if (pwrap_is_mt8135(wrp)) {
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- pwrap_writel(wrp, 0x4, PWRAP_CSHEXT);
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- pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_WRITE);
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- pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_READ);
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- pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_START);
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- pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_END);
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- } else {
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- pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_WRITE);
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- pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_READ);
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- pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_START);
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- pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_END);
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- }
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+ pwrap_writel(wrp, 0x4, PWRAP_CSHEXT);
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+ pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_WRITE);
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+ pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_READ);
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+ pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_START);
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+ pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_END);
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+
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+ return 0;
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+}
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+
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+static int pwrap_mt8173_init_reg_clock(struct pmic_wrapper *wrp)
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+{
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+ pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_WRITE);
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+ pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_READ);
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+ pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_START);
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+ pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_END);
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return 0;
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}
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@@ -699,7 +691,7 @@ static int pwrap_init(struct pmic_wrappe
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pwrap_writel(wrp, 1, PWRAP_WACS2_EN);
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- ret = pwrap_init_reg_clock(wrp);
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+ ret = wrp->master->init_reg_clock(wrp);
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if (ret)
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return ret;
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@@ -814,6 +806,20 @@ static const struct regmap_config pwrap_
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.max_register = 0xffff,
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};
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+static struct pmic_wrapper_type pwrap_mt8135 = {
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+ .regs = mt8135_regs,
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+ .type = PWRAP_MT8135,
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+ .arb_en_all = 0x1ff,
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+ .init_reg_clock = pwrap_mt8135_init_reg_clock,
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+};
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+
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+static struct pmic_wrapper_type pwrap_mt8173 = {
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+ .regs = mt8173_regs,
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+ .type = PWRAP_MT8173,
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+ .arb_en_all = 0x3f,
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+ .init_reg_clock = pwrap_mt8173_init_reg_clock,
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+};
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+
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static struct of_device_id of_pwrap_match_tbl[] = {
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{
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.compatible = "mediatek,mt8135-pwrap",
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