0d9f760f27
Includes memory allocation fixes as well as several networking fixes. Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 37103
34 lines
1.1 KiB
Diff
34 lines
1.1 KiB
Diff
From eb6f94f9d53a0eecf0ff8edd5318ee2dd5403a01 Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Mon, 20 May 2013 20:30:11 +0200
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Subject: [PATCH 132/164] MIPS: ralink: make mt7620 ram detect verbose
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Make the code print which of SDRAM, DDR1 or DDR2 was detected.
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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arch/mips/ralink/mt7620.c | 3 +++
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1 file changed, 3 insertions(+)
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--- a/arch/mips/ralink/mt7620.c
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+++ b/arch/mips/ralink/mt7620.c
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@@ -214,16 +214,19 @@ void prom_soc_init(struct ralink_soc_inf
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switch (dram_type) {
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case SYSCFG0_DRAM_TYPE_SDRAM:
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+ pr_info("Board has SDRAM\n");
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soc_info->mem_size_min = MT7620_SDRAM_SIZE_MIN;
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soc_info->mem_size_max = MT7620_SDRAM_SIZE_MAX;
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break;
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case SYSCFG0_DRAM_TYPE_DDR1:
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+ pr_info("Board has DDR1\n");
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soc_info->mem_size_min = MT7620_DDR1_SIZE_MIN;
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soc_info->mem_size_max = MT7620_DDR1_SIZE_MAX;
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break;
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case SYSCFG0_DRAM_TYPE_DDR2:
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+ pr_info("Board has DDR2\n");
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soc_info->mem_size_min = MT7620_DDR2_SIZE_MIN;
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soc_info->mem_size_max = MT7620_DDR2_SIZE_MAX;
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break;
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