aebf73f045
r47388 accidentially changed 2 files too many Signed-off-by: John Crispin <blogic@openwrt.org> SVN-Revision: 47389
131 lines
4.4 KiB
Diff
131 lines
4.4 KiB
Diff
--- a/arch/mips/ralink/mt7620.c
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+++ b/arch/mips/ralink/mt7620.c
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@@ -101,28 +101,28 @@ static struct rt2880_pmx_group mt7620a_p
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};
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static struct rt2880_pmx_func pwm1_grp_mt7628[] = {
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- FUNC("sdxc", 3, 19, 1),
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+ FUNC("sdxc d6", 3, 19, 1),
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FUNC("utif", 2, 19, 1),
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FUNC("gpio", 1, 19, 1),
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- FUNC("pwm", 0, 19, 1),
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+ FUNC("pwm1", 0, 19, 1),
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};
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static struct rt2880_pmx_func pwm0_grp_mt7628[] = {
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- FUNC("sdxc", 3, 18, 1),
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+ FUNC("sdxc d7", 3, 18, 1),
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FUNC("utif", 2, 18, 1),
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FUNC("gpio", 1, 18, 1),
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- FUNC("pwm", 0, 18, 1),
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+ FUNC("pwm0", 0, 18, 1),
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};
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static struct rt2880_pmx_func uart2_grp_mt7628[] = {
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- FUNC("sdxc", 3, 20, 2),
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+ FUNC("sdxc d5 d4", 3, 20, 2),
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FUNC("pwm", 2, 20, 2),
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FUNC("gpio", 1, 20, 2),
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FUNC("uart2", 0, 20, 2),
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};
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static struct rt2880_pmx_func uart1_grp_mt7628[] = {
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- FUNC("sdxc", 3, 45, 2),
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+ FUNC("sw_r", 3, 45, 2),
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FUNC("pwm", 2, 45, 2),
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FUNC("gpio", 1, 45, 2),
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FUNC("uart1", 0, 45, 2),
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@@ -165,7 +165,7 @@ static struct rt2880_pmx_func spi_cs1_gr
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FUNC("-", 3, 6, 1),
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FUNC("refclk", 2, 6, 1),
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FUNC("gpio", 1, 6, 1),
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- FUNC("spi", 0, 6, 1),
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+ FUNC("spi cs1", 0, 6, 1),
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};
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static struct rt2880_pmx_func spis_grp_mt7628[] = {
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@@ -182,27 +182,43 @@ static struct rt2880_pmx_func gpio_grp_m
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FUNC("gpio", 0, 11, 1),
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};
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-#define MT7628_GPIO_MODE_MASK 0x3
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-
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-#define MT7628_GPIO_MODE_PWM1 30
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-#define MT7628_GPIO_MODE_PWM0 28
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-#define MT7628_GPIO_MODE_UART2 26
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-#define MT7628_GPIO_MODE_UART1 24
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-#define MT7628_GPIO_MODE_I2C 20
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-#define MT7628_GPIO_MODE_REFCLK 18
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-#define MT7628_GPIO_MODE_PERST 16
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-#define MT7628_GPIO_MODE_WDT 14
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-#define MT7628_GPIO_MODE_SPI 12
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-#define MT7628_GPIO_MODE_SDMODE 10
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-#define MT7628_GPIO_MODE_UART0 8
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-#define MT7628_GPIO_MODE_I2S 6
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-#define MT7628_GPIO_MODE_CS1 4
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-#define MT7628_GPIO_MODE_SPIS 2
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-#define MT7628_GPIO_MODE_GPIO 0
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+static struct rt2880_pmx_func wled_kn_grp_mt7628[] = {
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+ FUNC("rsvd", 3, 35, 1),
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+ FUNC("rsvd", 2, 35, 1),
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+ FUNC("gpio", 1, 35, 1),
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+ FUNC("wled_kn", 0, 35, 1),
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+};
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+
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+static struct rt2880_pmx_func wled_an_grp_mt7628[] = {
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+ FUNC("rsvd", 3, 35, 1),
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+ FUNC("rsvd", 2, 35, 1),
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+ FUNC("gpio", 1, 35, 1),
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+ FUNC("wled_an", 0, 35, 1),
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+};
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+
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+#define MT7628_GPIO_MODE_MASK 0x3
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+
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+#define MT7628_GPIO_MODE_WLED_KN 48
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+#define MT7628_GPIO_MODE_WLED_AN 32
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+#define MT7628_GPIO_MODE_PWM1 30
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+#define MT7628_GPIO_MODE_PWM0 28
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+#define MT7628_GPIO_MODE_UART2 26
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+#define MT7628_GPIO_MODE_UART1 24
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+#define MT7628_GPIO_MODE_I2C 20
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+#define MT7628_GPIO_MODE_REFCLK 18
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+#define MT7628_GPIO_MODE_PERST 16
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+#define MT7628_GPIO_MODE_WDT 14
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+#define MT7628_GPIO_MODE_SPI 12
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+#define MT7628_GPIO_MODE_SDMODE 10
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+#define MT7628_GPIO_MODE_UART0 8
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+#define MT7628_GPIO_MODE_I2S 6
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+#define MT7628_GPIO_MODE_CS1 4
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+#define MT7628_GPIO_MODE_SPIS 2
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+#define MT7628_GPIO_MODE_GPIO 0
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static struct rt2880_pmx_group mt7628an_pinmux_data[] = {
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- GRP_G("pmw1", pwm1_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_PWM1),
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- GRP_G("pmw0", pwm0_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_PWM0),
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+ GRP_G("pwm1", pwm1_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_PWM1),
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+ GRP_G("pwm0", pwm0_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_PWM0),
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GRP_G("uart2", uart2_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_UART2),
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GRP_G("uart1", uart1_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_UART1),
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GRP_G("i2c", i2c_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_I2C),
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@@ -216,6 +232,8 @@ static struct rt2880_pmx_group mt7628an_
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GRP_G("spi cs1", spi_cs1_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_CS1),
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GRP_G("spis", spis_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_SPIS),
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GRP_G("gpio", gpio_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_GPIO),
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+ GRP_G("wled_an", wled_an_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_WLED_AN),
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+ GRP_G("wled_kn", wled_kn_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_WLED_KN),
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{ 0 }
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};
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@@ -529,7 +547,11 @@ void prom_soc_init(struct ralink_soc_inf
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(rev & CHIP_REV_ECO_MASK));
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cfg0 = __raw_readl(sysc + SYSC_REG_SYSTEM_CONFIG0);
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- dram_type = (cfg0 >> SYSCFG0_DRAM_TYPE_SHIFT) & SYSCFG0_DRAM_TYPE_MASK;
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+
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+ if (ralink_soc == MT762X_SOC_MT7628AN)
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+ dram_type = ((cfg0&0x00000001) == 0x00000001)?SYSCFG0_DRAM_TYPE_DDR1_MT7628:SYSCFG0_DRAM_TYPE_DDR2_MT7628;
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+ else
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+ dram_type = (cfg0 >> SYSCFG0_DRAM_TYPE_SHIFT) & SYSCFG0_DRAM_TYPE_MASK;
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soc_info->mem_base = MT7620_DRAM_BASE;
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if (ralink_soc == MT762X_SOC_MT7628AN)
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