60 lines
2.1 KiB
Diff
60 lines
2.1 KiB
Diff
From 3da3528448850ccde412d52fb939575641ada80d Mon Sep 17 00:00:00 2001
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From: "Maciej W. Rozycki" <macro@linux-mips.org>
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Date: Wed, 18 Sep 2013 19:08:15 +0100
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Subject: [PATCH 204/215] MIPS: 74K/1074K: Correct erratum workaround.
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Make sure 74K revision numbers are not applied to the 1074K. Also catch
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invalid usage.
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Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
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Cc: Steven J. Hill <Steven.Hill@imgtec.com>
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Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
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Cc: linux-mips@linux-mips.org
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Patchwork: https://patchwork.linux-mips.org/patch/5857/
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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(cherry picked from commit 9213ad77070ea75fc3a5e43e3d9e9c4146e4930a)
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---
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arch/mips/mm/c-r4k.c | 26 ++++++++++++++++++--------
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1 file changed, 18 insertions(+), 8 deletions(-)
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--- a/arch/mips/mm/c-r4k.c
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+++ b/arch/mips/mm/c-r4k.c
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@@ -785,20 +785,30 @@ static inline void rm7k_erratum31(void)
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static inline void alias_74k_erratum(struct cpuinfo_mips *c)
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{
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+ unsigned int imp = c->processor_id & 0xff00;
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+ unsigned int rev = c->processor_id & PRID_REV_MASK;
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+
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/*
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* Early versions of the 74K do not update the cache tags on a
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* vtag miss/ptag hit which can occur in the case of KSEG0/KUSEG
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* aliases. In this case it is better to treat the cache as always
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* having aliases.
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*/
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- if ((c->processor_id & 0xff) <= PRID_REV_ENCODE_332(2, 4, 0))
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- c->dcache.flags |= MIPS_CACHE_VTAG;
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- if ((c->processor_id & 0xff) == PRID_REV_ENCODE_332(2, 4, 0))
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- write_c0_config6(read_c0_config6() | MIPS_CONF6_SYND);
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- if (((c->processor_id & 0xff00) == PRID_IMP_1074K) &&
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- ((c->processor_id & 0xff) <= PRID_REV_ENCODE_332(1, 1, 0))) {
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- c->dcache.flags |= MIPS_CACHE_VTAG;
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- write_c0_config6(read_c0_config6() | MIPS_CONF6_SYND);
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+ switch (imp) {
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+ case PRID_IMP_74K:
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+ if (rev <= PRID_REV_ENCODE_332(2, 4, 0))
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+ c->dcache.flags |= MIPS_CACHE_VTAG;
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+ if (rev == PRID_REV_ENCODE_332(2, 4, 0))
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+ write_c0_config6(read_c0_config6() | MIPS_CONF6_SYND);
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+ break;
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+ case PRID_IMP_1074K:
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+ if (rev <= PRID_REV_ENCODE_332(1, 1, 0)) {
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+ c->dcache.flags |= MIPS_CACHE_VTAG;
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+ write_c0_config6(read_c0_config6() | MIPS_CONF6_SYND);
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+ }
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+ break;
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+ default:
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+ BUG();
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}
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}
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