To keep the status of a LED connected to the stp during boot, the get
callback is required. If the callback is missing and the LED default
state is set to keep in the devicetree, the gpio led driver errors out
during load.
Fixes: FS#1620
Signed-off-by: Mathias Kresin <dev@kresin.me>
Don't mask bit 4 of the AT8022 phy id. If bit 4 of the AT8022 phy id
(0x004dd023) is masked, it will match the phy id of the AR8327 switch
(0x004dd033) as well.
It results in applied at803x driver settings/callbacks, which will at
least limit the AR8327 phys to 100MBit operation instead of the possible
1000MBit.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Backport hot off the press upstream netlink patch. Fixes stats display
from CAKE qdisc on MIPS allowing us to bump CAKE to latest version.
The gen_stats facility will add a header for the toplevel nlattr of type
TCA_STATS2 that contains all stats added by qdisc callbacks. A reference
to this header is stored in the gnet_dump struct, and when all the
per-qdisc callbacks have finished adding their stats, the length of the
containing header will be adjusted to the right value.
However, on architectures that need padding (i.e., that don't set
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS), the padding nlattr is added
before the stats, which means that the stored pointer will point to the
padding, and so when the header is fixed up, the result is just a very
big padding nlattr. Because most qdiscs also supply the legacy TCA_STATS
struct, this problem has been mostly invisible, but we exposed it with
the netlink attribute-based statistics in CAKE.
Fix the issue by fixing up the stored pointer if it points to a padding
nlattr.
Signed-off-by: Kevin Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk>
In some cases, recent builds fail to boot from flash with at least some
MT7621 based devices. The error message is:
"LZMA ERROR 1 - must RESET board to recover"
Booting the same kernel via TFTP works for some reason.
Through testing I figured out that limiting the LZMA dictionary size
seems to prevent these errors
Signed-off-by: Felix Fietkau <nbd@nbd.name>
This patch ports the TP-Link TL-WR741ND v4 and TL-WR740ND v4 to the
ath79 target.
Because the two devices share the same hw layout, this patch adds a common
.dtsi which is included by the two .dts.
Signed-off-by: Rocco Folino <rocco@folino.io>
The order of the Ethernet ports were mixed up.
This commit fixes the order to be aligned with the physical layout.
Signed-off-by: Lev <leventelist@gmail.com>
The Unifi AC Mesh is equivalent to the Unifi AC Lite. However,
for setting certain parameters with the flashed device it is
helpful that the devices know their variant (e.g. automatically
setting antenna gain for the different antennas in Lite and Mesh).
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
- fix sysupgrade check
- move usb to v4 dts because v5 doesn't have it
- make wan mac address behave like ar71xx target
- add orange wan led support, it can be userspace activated like:
on:
echo default-on > /sys/class/leds/tp-link\:orange\:wan/trigger
off:
echo none > /sys/class/leds/tp-link\:orange\:wan/trigger
Signed-off-by: Lucian Cristian <lucian.cristian@gmail.com>
rework the dts to a common unifi-ac dtsi
pro network is connected via phy0 and has usb ports
lite network is connected via phy4 without usb ports
Signed-off-by: Lucian Cristian <lucian.cristian@gmail.com>
This target can automatically detect the correct memory size and we've
been using it for long in ar71xx.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Check if the GPIO is valid (or set at all). If no GPIO is set in the
devicetree, a gpiolib related kernel warning + stacktrace is shown during
boot and gpio-export reports GPIOs as exported albeit none really is.
Signed-off-by: Mathias Kresin <dev@kresin.me>
The original device support patch configured the amber wlan LEDs (which
are meant as error indicator by the OEM) controlled by the SOC's GPIO
as wlan traffic indicators, as the correct white wlan LEDs are
connected to GPIOs controlled by the QCA9984/ ath10k wlan cards were
not accessible. The recent addition of GPIO/ LED support to ath10k now
makes it possible to use the correct white LEDs instead - and
"mac80211: ath10k: use tpt LED trigger by default" also enables them by
default. While both LEDs are independent of each other (two separate
LEDs sharing one light tunnel), triggering both on wlan traffic is not
the intended behaviour (bright yellow light).
Tested on the ZyXEL NBG6817.
Signed-off-by: Stefan Lippers-Hollmann <s.l-h@gmx.de>
Move to i2c pins pinmux node to the pinctrl node.
Fixes: a0685deec4 ("ramips: Add i2c support for mt7620n")
Signed-off-by: Andrey Jr. Melnikov <temnota.am@gmail.com>
[fix commit message]
Signed-off-by: Mathias Kresin <dev@kresin.me>
Remove the "firmware" partition definition from the DTS of R7800
to fix sysupgrade.
Commit 4645a6d3 defined CONFIG_MTD_SPLIT_UIMAGE_FW=y for ipq806x
and that causes mtd to misbehave as additional kernel and ubi
partitions are detected from inside the "firmware" partition.
[ 1.111324] 0x000001480000-0x000001880000 : "kernel"
[ 1.121005] 0x000001880000-0x000007900000 : "ubi"
[ 1.283912] 0x000007900000-0x000008000000 : "reserve"
[ 1.296407] 0x000001480000-0x000007900000 : "firmware"
[ 1.468043] no rootfs found after FIT image in "firmware"
[ 2.426860] 2 uimage-fw partitions found on MTD device firmware
[ 2.426931] 0x000001480000-0x000001880000 : "kernel"
[ 2.440420] 0x000001880000-0x000007900000 : "ubi"
Both kernel and ubi are already defined in DTS, so this duplication
leads into errors in sysupgrade:
Writing from <stdin> to kernel ...
ubiattach: error!: strtoul: unable to parse the number '6 mtd10'
ubiattach: error!: bad MTD device number: "6 mtd10"
The partition is defined to same area as kernel+ubi, and is not
needed for sysupgrade anymore. Remove it to fix things.
Only tested for the R7800 but all of them should behave equal.
Fixes: FS#1617
Signed-off-by: Hannu Nyman <hannu.nyman@iki.fi>
[squashed commits, add "tested on" note]
Signed-off-by: Mathias Kresin <dev@kresin.me>
WN-GX300GR has 5x RJ45 ports (port 0-4), and these ports are
orderd on the device as follows:
4 3 2 1 0
1-4: lan
0: wan
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Use the new dynamic partition split in tplink-safeloader so we no longer
have to worry about kernel size increases.
Signed-off-by: Lucian Cristian <lucian.cristian@gmail.com>
This patch adds support for ZyXEL NBG6617
Hardware highlights:
SOC: IPQ4018 / QCA Dakota
CPU: Quad-Core ARMv7 Processor rev 5 (v7l) Cortex-A7
DRAM: 256 MiB DDR3L-1600/1866 Nanya NT5CC128M16IP-DI @ 537 MHz
NOR: 32 MiB Macronix MX25L25635F
ETH: Qualcomm Atheros QCA8075 Gigabit Switch (4 x LAN, 1 x WAN)
USB: 1 x 3.0 (via Synopsys DesignWare DWC3 controller in the SoC)
WLAN1: Qualcomm Atheros QCA4018 2.4GHz 802.11bgn 2:2x2
WLAN2: Qualcomm Atheros QCA4018 5GHz 802.11a/n/ac 2:2x2
INPUT: RESET Button, WIFI/Rfkill Togglebutton, WPS Button
LEDS: Power, WAN, LAN 1-4, WLAN 2.4GHz, WLAN 5GHz, USB, WPS
Serial:
WARNING: The serial port needs a TTL/RS-232 3.3v level converter!
The Serial setting is 115200-8-N-1. The 1x4 .1" header comes
pre-soldered. Pinout:
1. 3v3 (Label printed on the PCB), 2. RX, 3. GND, 4. TX
first install / debricking / restore stock:
0. Have a PC running a tftp-server @ 192.168.1.99/24
1. connect the PC to any LAN-Ports
2. put the openwrt...-factory.bin (or V1.00(ABCT.X).bin for stock) file
into the tftp-server root directory and rename it to just "ras.bin".
3. power-cycle the router and hold down the the WPS button (for 30sek)
4. Wait (for a long time - the serial console provides some progress
reports. The u-boot says it best: "Please be patient".
5. Once the power LED starts to flashes slowly and the USB + WPS LEDs
flashes fast at the same time. You have to reboot the device and
it should then come right up.
Installation via Web-UI:
0. Connect a PC to the powered-on router. It will assign your PC a
IP-address via DHCP
1. Access the Web-UI at 192.168.1.1 (Default Passwort: 1234)
2. Go to the "Expert Mode"
3. Under "Maintenance", select "Firmware-Upgrade"
4. Upload the OpenWRT factory image
5. Wait for the Device to finish.
It will reboot into OpenWRT without any additional actions needed.
To open the ZyXEL NBG6617:
0. remove the four rubber feet glued on the backside
1. remove the four philips screws and pry open the top cover
(by applying force between the plastic top housing from the
backside/lan-port side)
Access the real u-boot shell:
ZyXEL uses a proprietary loader/shell on top of u-boot: "ZyXEL zloader v2.02"
When the device is starting up, the user can enter the the loader shell
by simply pressing a key within the 3 seconds once the following string
appears on the serial console:
| Hit any key to stop autoboot: 3
The user is then dropped to a locked shell.
|NBG6617> HELP
|ATEN x[,y] set BootExtension Debug Flag (y=password)
|ATSE x show the seed of password generator
|ATSH dump manufacturer related data in ROM
|ATRT [x,y,z,u] RAM read/write test (x=level, y=start addr, z=end addr, u=iterations)
|ATGO boot up whole system
|ATUR x upgrade RAS image (filename)
|NBG6617>
In order to escape/unlock a password challenge has to be passed.
Note: the value is dynamic! you have to calculate your own!
First use ATSE $MODELNAME (MODELNAME is the hostname in u-boot env)
to get the challange value/seed.
|NBG6617> ATSE NBG6617
|012345678901
This seed/value can be converted to the password with the help of this
bash script (Thanks to http://www.adslayuda.com/Zyxel650-9.html authors):
- tool.sh -
ror32() {
echo $(( ($1 >> $2) | (($1 << (32 - $2) & (2**32-1)) ) ))
}
v="0x$1"
a="0x${v:2:6}"
b=$(( $a + 0x10F0A563))
c=$(( 0x${v:12:14} & 7 ))
p=$(( $(ror32 $b $c) ^ $a ))
printf "ATEN 1,%X\n" $p
- end of tool.sh -
|# bash ./tool.sh 012345678901
|
|ATEN 1,879C711
copy and paste the result into the shell to unlock zloader.
|NBG6617> ATEN 1,0046B0017430
If the entered code was correct the shell will change to
use the ATGU command to enter the real u-boot shell.
|NBG6617> ATGU
|NBG6617#
Co-authored-by: David Bauer <mail@david-bauer.net>
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
Signed-off-by: David Bauer <mail@david-bauer.net>
The sender domain has a DMARC Reject/Quarantine policy which disallows
sending mailing list messages using the original "From" header.
To mitigate this problem, the original message has been wrapped
automatically by the mailing list software.
Refresh patches.
Remove patch that can be reverse applied:
mvebu/patches-4.14/530-ATA-ahci_mvebu-enable-stop_engine-override.patch
mvebu/patches-4.14/531-ATA-ahci_mvebu-pmp-stop-errata-226.patch
Update patch that no longer applied:
ipq806x/patches-4.14/0035-clk-mux-Split-out-register-accessors-for-reuse.patch
Compiled-tested-for: lantiq, ramips
Run-tested-on: lantiq BT hh5a, ramips MIR3g
Signed-off-by: Kevin Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk>
Tested-by: Michael Yartys <michael.yartys@protonmail.com>
Tested-by: Rosen Penev <rosenp@gmail.com>
Netgear WNR612 v2:
- cpu Atheros AR7240 (Python) @400MHz
- flash 4MB
- ram 32MB
- ethernet 10/100: 1xwan + 2xlan (only two)
- radio AR9285
As there is a rebranded WNR612v2 called ON Networks N150R, add
a dtsi which includes all device support, and add a separate dts
for the device only (with a separate one for the subsequent N150R).
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
Have mktplinkfw fill in the rootfs offset so the firmware splitter can
find it without aligning to erase blocks.
Signed-off-by: Alex Maclean <monkeh@monkeh.net>
Specification:
- System-On-Chip: MT7620A
- CPU/Speed: 580 MHz
- Flash-Chip: Winbond 25Q64BVSIG
- Flash size: 8192 KiB
- RAM: 64 MiB
- Wireless No1: SoC-integrated: MT7620A 2.4GHz 802.11bgn
- Wireless No2: On-board chip: MT7610EN 5GHz 802.11ac
- Switch: RTL8367RB Gigabit Switch
- USB: Yes 1 x 2.0
Preparing a TFTP recovery image for initial flashing:
Currently the only method to install openwrt for the first time is via
TFTP download in u-boot. After first install you can use regular updates.
WARNING: This method also overwrites the bootloader partition!
Create a TFTP recovery image:
1) Download a stock TP-Link Firmware file here:
https://www.tp-link.com/en/download/Archer-C2_V1.html#Firmware
2) Extract u-boot from the binary file:
#> dd if=c2v1_stock_firmware.bin of=c2v1_uboot.bin bs=1 skip=512 count=131072
3) Now merge the sysupgrade image and the u-boot into one binary:
#> cat c2v1_uboot.bin openwrt-squashfs-sysupgrade.bin > ArcherC2V1_tp_recovery.bin
The resulting image can be flashed via TFTP recovery mode.
Flash instructions:
1) To flash the recovery image, start a TFTP server from IP address
192.168.0.66 and serve the recovery image named
ArcherC2V1_tp_recovery.bin.
2) Connect your device to the LAN port, then press the WPS/Reset button
and power it up. Keep pressing the WPS/Reset button for 10 seconds.
It will try to download the recovery image and flash it.
It can take up to 20-25 minutes to finish. When it reaches 100%, the
router will reboot itself.
Signed-off-by: Serge Vasilugin <vasilugin@yandex.ru>
Signed-off-by: Franz Flasch <franz.flasch@gmx.at>
The rtl8367b driver never supported a mdio property and it is quite
likely that the switch never worked for the board.
Use the mii-bus property instead to manage the switch via a mdio bus.
Signed-off-by: Franz Flasch <franz.flasch@gmx.at>
This PR adds support for a popular low-cost 2.4GHz N based AP
Specifications:
- SoC: Qualcomm Atheros QCA9533 (650MHz)
- RAM: 64MB
- Storage: 8 MB SPI NOR
- Wireless: 2.4GHz N based built into SoC 2x2
- Ethernet: 1x 100/10 Mbps, integrated into SoC, 24V POE IN
Installation:
Flash factory image through stock firmware WEB UI
or through TFTP
To get to TFTP recovery just hold reset button while powering on for
around 4-5 seconds and release.
Rename factory image to recovery.bin
Stock TFTP server IP:192.168.0.100
Stock device TFTP adress:192.168.0.254
Notes:
TP-Link does not use bootstrap registers so without this patch reference
clock detects as 40MHz while it is actually 25MHz.
This is due to messed up bootstrap resistor configuration on the PCB.
Provided GPL code just forces 25MHz reference clock.
That causes booting with completely wrong clocks, for example, CPU tries
to boot at 1040MHz while the stock is 650MHz.
So this PR depends on PR #672 to remove 40MHz reference clock.
Thanks to Sven Eckelmann <sven@narfation.org> for properly patching that.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Add support for detecting TP-Link Pharos v2 boards.
They use different format in product-info partition than v1 boards.
Code was written mostly by Alexander Couzens <lynxis@fe80.eu>
Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
The 666-Add-support-for-MAP-E-FMRs-mesh-mode.patch kernel patches
break the possibility for using an ip4ip6 tunnel interface as a fall
back interface accepting ip4-in-ip6 tunneled packets from any remote
address. This works out of the box with any normal (non-666-patched)
kernel and can be configured by setting up an 'ip -6 tunnel' with type
'any' or 'ip4ip6' and a remote address of '::'.
The misbehavior comes with line 290 the patch which discards all packets
that do not show the expected saddr, even if no single fmr rule was
defined and despite the validity of the saddr was already approved earlier.
Signed-off-by: Axel Neumann <neumann@cgws.de>
Acked-by: Hans Dedecker <dedeckeh@gmail.com>
This commit adds support for the MT7623A-based UniElec U7623-02 router,
with eMMC storage and 512MB RAM. The router can be delivered with NAND
Flash and more memory, but I only have access to the one configuration.
The DTS is structured in such a way that adding support for
more/different storage/memory should be straight forward.
The device has the following specifications:
* MT7623A (quad-core, 1.3 GHz)
* 512MB RAM (DDR3)
* 8GB storage (eMMC 4.5)
* 2x normal miniPCIe slots
* 1x miniPCIe slot that is connected via an internal USB OTG port
* 5x 1Gbps Ethernet (MT7530 switch)
* 1x UART header
* 1x USB 3.0 port
* 1x SATA 3.0
* 1x 40P*0.5mm FPC for MIPI LCD
* 1x SIM slot
* 12x LEDs (2 GPIO controlled)
* 1x reset button
* 1x DC jack for main power (12V)
The following has been tested and is working:
* Ethernet switch
* miniPCIe slots (tested with Wi-Fi cards)
* USB 3.0 port
* sysupgrade
* reset button
Not working:
* The miniPCIe connected via USB OTG. For the port to work, some MUSB
glue must be added. I am currently in the process of porting the glue
from the vendor SDK.
Not tested:
* SATA 3.0
* MIPI LCD
Installation:
The board ships with u-boot, and the first installation needs to be done
via the bootloader using tftp. Step number one is to update the MBR of
the eMMC, as the one that ships with the device is broken. Since the
device can ship with different storage sizes, I will not provide the
exact steps for creating a valid MBR. However, I have made some
assumptions about the disk layout - there must be one 8MB recovery
partition (FAT32) and a partition for the rootfs (Linux).
The board loads the kernel from block 0xA00 (2560) and I have reserved
32MB for the kernel (65536 blocks). I have aligned the partitions on the
erase block size (4096 byte), so the recovery partition must start on
block 69632 and end on 86016 (16385 sectors). The rootfs is assumed to
start on sector 90112.
In order to install the mbr, you run the following commands from the
u-boot command line:
* tftpboot ${loadaddr} <name of mbr file>
* mmc device 0
* mmc write ${loadaddr} 0x00 1
Run the following commands to install + boot OpenWRT:
* tftpboot ${loadaddr} openwrt-mediatek-mt7623-7623a-unielec-u7623-02-emmc-512m-squashfs-sysupgrade-emmc.bin.gz
* run boot_wr_img
* run boot_rd_img
* bootm
Recovery:
In order to recover the router, you need to follow the installation
steps above (no need to replace MBR).
Notes:
* F2FS is used as the overlay filesystem.
* The device does not ship with any valid MAC address, so a random
address has to be generated. As a work-around, I write the initial
random MAC to a file on the recovery partition. The MAC of the WAN
interface is set to the MAC-address contained in this file on each boot,
and the address of the LAN-interfaces are WAN + 1. The MAC file is kept
across sysupgrade/firstboot.
My approach is slightly different than what the stock image does. The
first fives bytes of the MAC addresses in the stock image are static,
and then the last byte is random. I believe it is better to create fully
random MAC addresses.
* In order to support the miniPCIe-slots, I needed to add missing
pcie-nodes to mt7623.dtsi. The nodes are just c&p from the upstream
dtsi.
* One of the USB3.0 phys (u3phy2) on the board can be used as either USB
or PCI, and one of the wifi-cards is connected to this phy. In order to
support switching the phy from USB to PCI, I needed to patch the
phy-driver. The patch is based on a rejected (at least last time I
checked) PCI-driver submitted to the linux-mediatek mailing list.
* The eMMC is configured to boot from the user area, and according to
the data sheet of the eMMC this value can't be changed.
* I tried to structure the MBR more nicely and use for example a
FAT32-parition for the kernel, so that we don't need to write/read from
some offset. The bootloader does not support reading from
FAT32-paritions. While the command (fatload) is there, it just throws an
error when I try to use it.
* I will submit and hope to get the DTS for the device accepted
upstream. If and when that happens, I will update the patches
accordingly.
Signed-off-by: Kristian Evensen <kristian.evensen@gmail.com>
Both version of the vg3503j have the LAN1 labelled port connected to
switch port 4 and the LAN2 labelled port connected to switch port 2.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Specification:
- SoC: MediaTek MT7620A
- Flash: 8 MB
- RAM: 64 MB
- Ethernet: 4 FE ports and 1 GE port (RTL8211F on port 5)
- Wireless radio: MT7620 for 2.4G and MT7612E for 5G, both equipped with external PA.
- UART: 1 x UART on PCB - 57600 8N1
Flash instruction:
The U-boot is based on Ralink SDK so we can flash the firmware using UART:
1. Configure PC with a static IP address and setup an TFTP server.
2. Put the firmware into the tftp directory.
3. Connect the UART line as described on the PCB.
4. Power up the device and press 2, follow the instruction to
set device and tftp server IP address and input the firmware
file name. U-boot will then load the firmware and write it into
the flash.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
This commit adds support for the Mikrotik RouterBOARD RBM33g.
=Hardware=
The RBM33g is a mt7621 based device featuring three gigabit ports, 2
miniPCIe slots with sim card sockets, 1 M.2 slot, 1 USB 3.0 port and a male
onboard RS-232 serial port. Additionally there are a lot of accessible
GPIO ports and additional buses like i2c, mdio, spi and uart.
==Switch==
The three Ethernet ports are all connected to the internal switch of the
mt7621 SoC:
port 0: Ethernet Port next to barrel jack with PoE printed on it
port 1: Innermost Ethernet Port on opposite side of RS-232 port
port 2: Outermost Ethernet Port on opposite side of RS-232 port
port 6: CPU
==Flash==
The device has two spi flash chips. The first flash chips is rather small
(512 kB), connected to CS0 by default and contains only the RouterBOOT
bootloader and some factory information (e.g. mac address).
The second chip has a size of 16 MB, is by default connected to CS1 and
contains the firmware image.
==PCIe==
The board features three PCIe-enabled slots. Two of them are miniPCIe
slots (PCIe0, PCIe1) and one is a M.2 (Key M) slot (PCIe2).
Each of the miniPCIe slots is connected to a dedicated mini SIM socket
on the back of the board.
Power to all three PCIe-enabled slots is controlled via GPIOs on the
mt7621 SoC:
PCIe0: GPIO9
PCIe1: GPIO10
PCIe2: GPIO11
==USB==
The board has one external USB 3.0 port at the rear. Additionally PCIe
port 0 has a permanently enabled USB interface. PCIe slot 1 shares its
USB interface with the rear USB port. Thus only either the rear USB port
or the USB interface of PCIe slot 1 can be active at the same time. The
jumper next to the rear USB port controls which one is active:
open: USB on PCIe 1 is active
closed: USB on rear USB port is active
==Power==
The board can accept both, passive PoE and external power via a 2.1 mm
barrel jack. The input voltage range is 11-32 V.
=Installation=
==Prerequisites==
A USB -> RS-232 Adapter and a null modem cable are required for
installation.
To install an OpenWRT image to the device two components must be built:
1. A openwrt initramfs image
2. A openwrt sysupgrade image
===initramfs & sysupgrade image===
Select target devices "Mikrotik RBM33G" in
openwrt menuconfig and build the images. This will create the images
"openwrt-ramips-mt7621-mikrotik_rbm33g-initramfs-kernel.bin" and
"openwrt-ramips-mt7621-mikrotik_rbm33g-squashfs-sysupgrade.bin" in the output
directory.
==Installing==
**Make sure to back up your RouterOS license in case you do ever want to
go back to RouterOS using "/system license output" and back up the created
license file.**
Serial settings: 115200 8N1
The installation is a two-step process. First the
"openwrt-ramips-mt7621-mikrotik_rbm33g-initramfs-kernel.bin" must be booted
via tftp:
1. Set up a dhcp server that points the bootfile to tftp server serving
the "openwrt-ramips-mt7621-mikrotik_rbm33g-initramfs-kernel.bin"
initramfs image
2. Connect to WAN port (left side, next to sys-LED and power indicator)
3. Connect to serial port of board
4. Power on board and enter RouterBOOT setup menu
5. Set boot device to "boot over ethernet"
6. Set boot protocol to "dhcp protocol" (can be omitted if DHCP server
allows dynamic bootp)
6. Save config
7. Wait for board to boot via Ethernet
On the serial port you should now be presented with the OpenWRT boot log.
The next steps will install OpenWRT persistently.
1. Copy "openwrt-ramips-mt7621-mikrotik_rbm33g-squashfs-sysupgrade.bin" to the device
using scp.
2. Write openwrt to flash using "sysupgrade
openwrt-ramips-mt7621-mikrotik_rbm33g-squashfs-sysupgrade.bin"
Once the flashing completes reboot the router and let it boot from flash.
It should boot straight to OpenWRT.
Signed-off-by: Tobias Schramm <tobleminer@gmail.com>
TP-Link Archer C7 v5 is a dual-band AC1750 router, based on Qualcomm/Atheros
QCA9563+QCA9880.
Specification:
- 750/400/250 MHz (CPU/DDR/AHB
- 128 MB of RAM (DDR2)
- 16 MB of FLASH (SPI NOR)
- 3T3R 2.4 GHz
- 3T3R 5 GHz
- 5x 10/100/1000 Mbps Ethernet
- 10x LED, 2x button
- UART header on PCB
Flash instruction:
1. Upload lede-ar71xx-generic-archer-c7-v5-squashfs-factory.bin via Web interface
Flash instruction using TFTP recovery:
1. Set PC to fixed ip address 192.168.0.66
2. Download lede-ar71xx-generic-archer-c7-v5-squashfs-factory.bin
and rename it to ArcherC7v5_tp_recovery.bin
3. Start a tftp server with the file tp_recovery.bin in its root directory
4. Turn off the router
5. Press and hold Reset button
6. Turn on router with the reset button pressed and wait ~15 seconds
7. Release the reset button and after a short time
the firmware should be transferred from the tftp server
8. Wait ~30 second to complete recovery.
Signed-off-by: Arvid E. Picciani <aep@exys.org>
Apparently there are RPi1 devices with BRCM43430 wifi, such as the
Pi Zero W. Add the necessary packages for that to the image generated
for those boards as well.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
