Commit graph

22 commits

Author SHA1 Message Date
Felix Fietkau
9848d38aed ar71xx: fix a wifi card stability issue
when we receive a pci/ahb interrupt, we need to flush pending data for dma
from the device, otherwise the tx path may get stuck if the completion flag
of the dma descriptor is not updated at the time the tx interrupt arrives.

SVN-Revision: 21143
2010-04-24 17:24:11 +00:00
Felix Fietkau
aa3ff31b95 ar71xx: add support for ar7241 and ar7242
SVN-Revision: 20494
2010-03-26 22:35:41 +00:00
Gabor Juhos
1dedaf30a6 ar71xx: optimize register access in irq.c
SVN-Revision: 20286
2010-03-18 19:19:13 +00:00
Gabor Juhos
5f109ef2f3 ar71xx: move PCI intterupt handling code to pci-ar7{1xx,24x}.c
SVN-Revision: 20281
2010-03-18 19:18:54 +00:00
Gabor Juhos
4d32460353 ar71xx: use set_irq_chained_handler for the PCI IRQs
SVN-Revision: 20280
2010-03-18 19:18:50 +00:00
Gabor Juhos
1b8137eefc ar71xx: merge AR71XX_IRQ_CPU_{PCI,WMAC} into AR71XX_IRQ_CPU_IP2
SVN-Revision: 20279
2010-03-18 19:18:46 +00:00
Felix Fietkau
0849a208ce ar71xx: fix oprofile support
SVN-Revision: 20150
2010-03-11 18:48:57 +00:00
Gabor Juhos
97c35a7dde ar71xx: don't init PCI irqs on the AR7240 if the PCIe subsystem are in reset
SVN-Revision: 20007
2010-03-05 20:29:29 +00:00
Gabor Juhos
66f839ac67 oops, add missing semicolons
SVN-Revision: 17142
2009-08-06 09:42:29 +00:00
Gabor Juhos
e632633c5d get rid of some ifdefs in the IRQ code
SVN-Revision: 17141
2009-08-06 09:32:15 +00:00
Gabor Juhos
116576b3ba fix MISC IRQ handling on the AR7240
SVN-Revision: 17098
2009-08-02 13:27:43 +00:00
Gabor Juhos
f04fcfd801 make irq_chip definitions static
SVN-Revision: 16736
2009-07-07 18:04:26 +00:00
Gabor Juhos
3b47053fb3 AR7240 requires different IRQ unmasking code
SVN-Revision: 16734
2009-07-07 13:57:57 +00:00
Gabor Juhos
c38e7aa7b2 add missing break statement
SVN-Revision: 16701
2009-07-05 18:02:12 +00:00
Gabor Juhos
d55e5fb153 fix AR7240 PCI IRQ support
SVN-Revision: 16669
2009-07-04 05:18:37 +00:00
Gabor Juhos
c524244c08 initialize IRQs for the AR7240 SoC
SVN-Revision: 16646
2009-07-01 19:37:03 +00:00
Gabor Juhos
31c9a411eb flush more register writings
SVN-Revision: 16415
2009-06-11 07:18:05 +00:00
Gabor Juhos
3de6b54859 flush AR71XX_RESET_PCI_INT_ENABLE register after writing
SVN-Revision: 16372
2009-06-07 18:23:39 +00:00
Gabor Juhos
9668bbeea9 handle PCI_CORE interrupt as well
SVN-Revision: 16358
2009-06-06 13:48:36 +00:00
Gabor Juhos
067e900705 use SoC specific irq dispatch code
SVN-Revision: 13736
2008-12-23 13:59:04 +00:00
Gabor Juhos
d5bbef37fe rename reset register definitions
SVN-Revision: 13516
2008-12-04 16:55:43 +00:00
Gabor Juhos
f529a37420 surprise :p
SVN-Revision: 11894
2008-07-21 17:08:14 +00:00