The "QCA9531 v2.0 802.11n 2x2 2.4 GHz Premium SOC for WLAN Platforms"
datasheet (80-Y7991-1 Rev. C - October 2014) doesn't specify support for a
40 Mhz reference clock. The register description for "Bootstrap Options"
(page 31) defines following states for the bit 4 (REF_CLK):
* 0 - CLK25 (default)
* 1 - (reserved)
Devices like the TP-Link CPE210 v2 has this bit set to 1 but is using a 25
Mhz reference clock. OpenWrt is still interpreted this bit as 40 Mhz and
then break the bootup of the system due to this incorrect interpretation.
Signed-off-by: Sven Eckelmann <sven@narfation.org>
[refreshed patches]
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
WHQX E1700AC v2 is based on Qualcomm QCA9563 + QCA9880 + QCA8334.
Specification:
- 750/400/250 MHz (CPU/DDR/AHB)
- 128 MB of RAM (DDR2)
- 8/16 MB of FLASH (SPI NOR)
- 3T3R 2.4 GHz (QCA9563) with external FEM (SKY85309-11)
- 3T3R 5 GHz (QCA9880) with external FEM (SKY85728-11)
- 2x 10/100/1000 Mbps Ethernet (one port with PoE support)
- 1x miniPCIe slot (USB 2.0 bus only)
- 1x microSIM slot
- 1x USB 2.0
- 5x LED (4 driven by GPIO)
- 1x button (reset)
- 1x 2-pos switch
- 1x DC jack for main power input (9-48 V)
- UART (J5) and LEDs (J13) headers on PCB
WHQX E600G is based on Qualcomm QCA9531.
Specification:
- 650/391/216 MHz (CPU/DDR/AHB)
- 64/128 MB of RAM (DDR2)
- 8/16 MB of FLASH (SPI NOR)
- 2T2R 2.4 GHz (QCA9531) with external PA (LXK-6601)
- 2x 10/100 Mbps Ethernet (one port with PoE support)
- 1x miniPCIe slot (with PCIe and USB 2.0 buses)
- 1x microSIM slot
- 5x LED (4 driven by GPIO)
- 1x button (reset)
- 1x DC jack for main power input (9-48 V)
- UART (J100), SIM (J34), JTAG (J5) and LEDs (J7) headers on PCB
WHQX E600GAC is based on Qualcomm QCA9531 + QCA9887.
Specification:
- 650/391/216 MHz (CPU/DDR/AHB)
- 64/128 MB of RAM (DDR2)
- 8/16 MB of FLASH (SPI NOR)
- 2T2R 2.4 GHz (QCA9531)
- 1T1R 5 GHz (QCA9887) with external FEM (SKY85703-11)
- 2x 10/100 Mbps Ethernet
- 6x LED (1x RGB, 5 driven by GPIO)
- 1x button (reset)
- 1x DC jack for main power input (9-12 V)
- UART (J100), USB (J102), JTAG (J5) and LEDs (J7) header on PCB
Important notice:
First version of these boards are using different mtd layout, with ART
data at the end. You should not use v2 images on v1 board because it
will result in lost of ART data!
Flash instruction (using U-Boot CLI and tftp server):
1. Configure PC with static IP 192.168.1.10 and tftp server.
2. Rename "sysupgrade" filename to "firmware.bin" and place it in tftp
server directory.
3. Connect PC with one of RJ45 ports, power up the board and press
"enter" key to access U-Boot CLI.
4. Use the following command to update the device to OpenWrt: "run lfw".
Flash instruction (using U-Boot web-based recovery):
1. Configure PC with static IP 192.168.1.xxx(2-254)/24.
2. Connect PC with one of RJ45 ports, press the reset button, power up
the board and keep button pressed for around 6-7 seconds, until LEDs
start flashing.
3. Open your browser and enter 192.168.1.1, select "sysupgrade" image
and click the upgrade button.
Signed-off-by: Peng Zhang <sd20@qxwlan.com>
[reworked: image generation code, mach-* files, commit description,
fixed minor code style issues, rebased on master]
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
You should not define CFLAGS for the toolchain as this will also leak
into other targets if they share the same toolchain.
Cc: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The CN80XX Boot firmware uses an embedded FAT12 filesystem. For some reason
busybox can't mount this unless its enabled static in the kernel.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
When this target got updated to 4.14, this patch got removed to
re-evaluate if it was still needed.
Extensive testing now shows this issue is still present.
Let's re-add the patch to fix it for now.
As the uart bus is very low bandwidth .. performance impact is negligible.
Boot log:
[ 22.513051] imx-uart 2020000.serial: DMA transaction error.
[ 22.522721] imx-uart 2020000.serial: DMA transaction error.
As a sidenote:
The patch mentiones an issue with RS485, but the bootlog
errors above were recorded with the uart ports in standard RS232 mode.
Compile/Run-tested on imx6/GW5200
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
This makes it possible to add an iptables rule that offloads routing/NAT
packet processing to a software fast path. This fast path is much
quicker than running packets through the regular tables/chains.
Requires Linux 4.14
Signed-off-by: Felix Fietkau <nbd@nbd.name>
This only works with nftables for now, iptables support will be added
later. Includes a number of related upstream nftables improvements to
simplify backporting follow-up changes
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
The hardware emits some interrupts while initializing and handling them
can mess up the state or cause infinite loops.
Fix this by disabling IRQs during init and re-enabling them afterwards
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Tama Electric Axing W06 is a 2.4 GHz band 11n router, based on Mediatek
MT7688AN.
Specification:
- MT7688AN (575 MHz)
- 64 MB of RAM (DDR2 SDRAM)
- 16 MB of Flash (SPI)
- 1T1R 2.4 GHz
- 1x 10/100/1000 Mbps Ethernet
- 4x LEDs (GPIO connected: 3), 1x button
- 1x USB 2.0 Type-A (host)
- UART header on PCB (GND, RX, TX, Vcc from RJ45 side)
Flash instruction using sysupgrade image:
1. Connect micro-USB cable for power supply into W06 and turn on the
router
2. Connect to wifi with SSID "tama-*" with password. Complete SSID and
password are listed on the back of the router
3. Access to 192.168.1.1 and login with user name "admin" and password
empty
4. In firmware update（ファームウェア更新） page, click "参照" button
and click "ブラウザー" button to open file browser, select the
sysupgrade image and press OK button
5. Wait ~150 seconds to complete flashing
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Use the generic board detection for the GnuBee Personal Cloud Two
instead of the target specific one as all recent additions are doing.
Fixup the pinmux to set all pins used as GPIO to the function GPIO.
Request pins where used.
Drop the i2c from the dts. There is nothing connected. While at it fix an
indentation issue and use references instead of duplicating the whole
node path.
Use the same switch config as for the GB-PC1 and drop the led trigger for
the not supported IP1001 phy connected to second rgmii.
Fixes: c60a21532b ("ramips: Add support for the GnuBee Personal Cloud Two")
Signed-off-by: Mathias Kresin <dev@kresin.me>
Use the generic board detection for the D-Link DAP-1522 A1 instead of the
target specific one as all recent additions are doing.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Updated the devicetree source files to make use of the following
upstreamed drivers:
- xrx200 ethernet phy
- reset controller unit
- dwc2
- fpi
Use our custom xrx200 ethernet phy compatible to support boards, which
have switched the vr9 revision during lifetime, with a single devicetree
source file.
By switching to the dwc2 driver + usb phy framework, we don't need to used
our custom gpio power patch and can use a fixed regulator instead.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Mathias Kresin <dev@kresin.me>
On danube the USB0 registers are at 1e101000 similar to all other lantiq
SoCs.
On Danube and AR9 the USB core is connected to the AHB bus, hence we need
to enable the AHB Bus as well.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Add a custom xrx200 ethernet phy compatible to load the firmware matching
the vr9 revision without specifing an expected revision.
We have quite a few boards in the tree were later produced ones are using
a more recent vr9. It is impossible to distinguish which revision of the
vr9 is used without opening the case and removing a heatsink for some of
them.
Signed-off-by: Mathias Kresin <dev@kresin.me>
This reverts kernel commit 1eed40043579 ("MIPS: smp-mt: Use CPU interrupt
controller IPI IRQ domain support"). With the patch applied, the kernel
hangs during boot if SMP is active.
The Lantiq IRQ controller gets registered first and it directly handles
the MIPS native SW1/2 and HW0 - HW5 IRQs. It looks like this controller
already registers IRQ 0 - 7 and the generic driver only gets the following
IRQs starting later.
The upstream discussion can be found at
https://www.linux-mips.org/archives/linux-mips/2017-05/msg00059.html.
Signed-off-by: Mathias Kresin <dev@kresin.me>
This just copies the patches, configuration and dts files into the
directories hich are used for kernel 4.14.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Move the devicetree source files to a kernel specific directory in
preparation of adding kernel 4.14 support.
Rename the subtarget kernel config files to match a specific kernel
version.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Rename the gphy firmware to match the name requested by kernel 4.14 and
update the devicetree source files to use the new name.
Update the u-boot lantiq Makefile to be compatible with the new names as
well.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Add support to allow for per switch port VLAN priority (PCP) bits
for the ar8327/8337 chip using the swconfig utility.
Tested on Netgear R7800
Signed-off-by: Tan Hong Hui <hhtan72@yahoo.com>
This issue is also present in kernel 4.9 starting from 4.9.71
Adapted the patch, as the fixed function is in another location here.
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
This reverts commit 6c2e1ff80f.
GNU gzip does not fail when the image filename already contains the .gz
extension, this is a problem specific to pigz. Revert the commit, as we
now gzip the image twice.
Reported-by: Martin Schleier <drahemmaps@gmx.net>
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
