It is common that the router provider be used rather than product name.
One can see this in target/linux/ar71xx/base-files/etc/uci-defaults/01_leds
Signed-off-by: Michael J. Bazzinotti <mbazzinotti@gmail.com>
SVN-Revision: 45630
This patch adds support for the XW version of the Rocket M series devices
manufactured by Ubiquiti, based on the Atheros AR9342 SoC.
Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
SVN-Revision: 45553
It was reported that OM5P-AN needs not only a delay setting of 1 for RXD/RDV
but 2. These was found when testing with a NetGear GS752TP POE switch with a
cable length of 50ft and 250ft.
Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
SVN-Revision: 45524
The ETH_RXDV_DELAY (17:16) and ETH_RXD_DELAY (15:14) are currently not cleared
by the function ath79_setup_ar934x_eth_cfg. Clearing these in the
ath79_setup_ar934x_eth_cfg may cause problems on some hardware because they
rely on the preset value by the bootloader.
Instead another function is introduced which also works on ETH_CFG on AR934x.
It can be used to safely clear and set ETH_RXDV_DELAY and ETH_RXD_DELAY on
machines which require special settings.
Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
SVN-Revision: 45523
The commit r38948 ("ag71xx: add F1E specific feature bit definitions to AR934X
register file") introduced definitions for some bits in the RDV/RXD part of the
ETH_CFG register of AR934x. These are incomplete because ETH_RXDV_DELAY is
specified as 17:16 and ETH_RXD_DELAY is specified 15:14. The original commit
only specified the lower bits. The upper bits also have to be unset when the
lower bits should only be set.
Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
SVN-Revision: 45522
The tx/rx delay bits in the ETH_XMII_CONTROL register have to be unset when the
enable_rgmii_rx_delay/enable_rgmii_tx_delay will be set in the AT803x PHY.
Othwise the throughput in gigabit mode is heavily reduced.
Signed-off-by: Sven Eckelmann <sven@open-mesh.org>
SVN-Revision: 45521
Profile definitions need to be checked and fixed before this patch can
be applied again.
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 45511
The new building code included the rootfs twice when building tplink initramfs images.
To make it more readable move initramfs into an own build step
Build/mktplinkfw-initramfs.
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
SVN-Revision: 45491
The new image size is verified by a running tplink device and checked
against mktplinkfw source code.
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
SVN-Revision: 45488
Open-Mesh OM5P-AN use a AT8035 (F1E) behind one of the ethernet ports. This PHY
requires special flags to work correctly. Otherwise massive packet loss happens
with active POE or when switching the link speed from gigabit ethernet to fast
ethernet. The generic PHY doesn't have support to change these settings.
Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
SVN-Revision: 45439
The OM5P-AN boards are suffering from ethernet packet loss when booting with
some active POE setups or when switching to Fast Ethernet when previously
booted with Gigabit ethernet attached.
The cause of the problem is that the AR8035 PHYs requires special register
settings to work reliably on these boards. Enable the RGMII TX, RX delays and
disable SmartEE functionality of the AR8035 PHYs. Also enable the RXD and RDV
delay in the ETH_CFG register to fix the issue.
Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
SVN-Revision: 45438
None of the LEDs are enabled by default on the Hornet-UB X2 board
(the 16/64MB version of the Hornet-UB), because it uses a different
board-name ("hornet-ub-x2"); but hornet-ub and hornet-ub-x2 boards
are equivalent WRT their LEDs.
SIgned-off-by: Joshua Judson Rosen <jrosen@harvestai.com>
SVN-Revision: 45328
On newer Mikrotik boards, the radio calibration data
is stored differently and uses LZO compression instead
of RLE.
Update the RouterBOOT helper code to support the new
format.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 45297
Platform device support has been removed from the gpio-74x164
driver in 3.14. Restore that.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 45203
The setting has been lost during the transition to 3.18.
The CONFIG_M25PXX_PREFER_SMALL_SECTOR_ERASE option is not
available anymore, so use CONFIG_MTD_SPI_NOR_USE_4K_SECTORS
instead.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 45161
There were a few issues with the existing code to detect the model string:
* Always using the string starting with byte 56 would cut off the W of WNDR when
the ID starts with 29763654+16+64 instead of 29763654+16+128
* The string contained garbage after the zero byte instead of cutting it off
after the zero (which wasn't always visible using busybox tools, but could
confuse other scripts)
Tested on a WNDR3700v1 and a WNDR3700v2 using the new 29763654+16+64 ID in the
ART. Furthermore, tested against ART dumps of a WNDR3700v2 using the old
$'\xff...' value and a WNDR3800.
The [ -z "$model" ] check was dropped as there is no way to actually hit this
unless no ART partition is found at all.
The awk command was carefully crafted to work both with gawk and the (horribly
broken) busybox awk.
Fixes#18992.
Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net>
SVN-Revision: 45140
There are two versions of the GL.iNet, the 6408A and the 6416A. The only
difference is the flash size.
Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net>
SVN-Revision: 44860
