Legacy probe passed the IRQSTAT registers instead of the IRQMASK
registers causing all register accesses to be offset by 16 bytes.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 44575
The driver expected data then dir, but both dts and legacy code passed
dir then data. Fix this by making the driver expect the registers in
ascending order, i.e. dir then data.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 44574
For bcm63xx integrated switches, broadcom changed the data endianess
to match the system endianess. But this only applies to within one word,
which causes 48/64 bit values to be still split into their "litte endian"
groups.
E.g. 48 bit values (with 5 being the most significant byte) aligned
0x00 ..01 or 0123
0x04 2345 45..
will become
0x00 ..10 resp. 3210
0x04 5432 54..
Likewise for 64 bit values.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 44568
Now that all gpio users without named gpios use DT, we do not need
to fix the gpio controller bases anymore.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 44567
Register buttons and leds through DT for all available dts,
and remove them from the board files.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
[jogo: remove leds/buttons from board files
fix wrong led polarities for dsl-274xb-c2, cpva642, p870hw
comment out spi-gpio and associated leds]
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 44566
Add a generic mmio gpio controller based driver and probe it
through device tree.
Use aliases for base calculation until we converted all users to
device tree or named gpios.
Convert bcm63xx_enet's ephy-reset gpio to use a named gpio.
While at it, remove the duplicate reset gpio defintion for livebox.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 44565
Add a dtsi for bcm3368, add a dts and profile for cvg834g, and convert
it to use ImageDTB. Since HCS requires more arguments, enhance the max
arguments of the call.
The image name is intentionally left blank to prevent non-initramfs
images to be built, as they currently contain no rootfs and consequently
won't work.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 44561
Most 16 MiB RAM devices don't even load elf kernels, so it's safe to
assume we have at least 32 MB RAM. This fixes tftp booting with the
default package set as this already produces an uncompressed
kernel > 8 MiB.
New limit is 8 MiB compressed / 24 MiB compressed.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 44558
Remove the need for the header file to be exported - we don't need most
of it anyway; all we care about are the offset of the rootfs length and
header crc fields.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 44557
We do not need to align the start of read only rootfs's to erase blocks.
This allows us to write the squashfs rootfs directly behind the kernel,
potentially freeing up one erase block.
We still need to align for jffs2, so add a flag for imagetag to
optionally align the rootfs start.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 44556
This adds the GMAC entries in the ipq806x dtsi file as well as in the
ap148 specific dts file.
This also adds the MDIO change as well.
Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
SVN-Revision: 44520
This change is fixing the issues observed when booting from NOR flash
with SMP enabled.
Error logs below:
building xattr subsystem, 0 of xdatum (0 unchecked, 0 orphan) and 0 of
xref (0 dead, 0 orphan) found.
m25p80 spi32766.0: SPI transfer failed: -110
spi_master spi32766: failed to transfer one message from queue
jffs2: Write of 873 bytes at 0x019001e8 failed. returned 0, retlen 792
Patch is cherry-picked from here:
https://www.codeaurora.org/cgit/quic/qsdk/oss/kernel/linux-msm/commit/drivers/spi/spi-qup.c?h=coconut_20140924&id=4faba89e3ffbb1c5f6232651375b9b3212b50f02
More details in the patch file.
Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
SVN-Revision: 44518
It took very little to make the TL-WDR4900 work under 3.19:
- config is the same as for 3.18
- only patch 210 had to be refreshed, the other patches are
the same as for 3.18
- in /etc/config/wireless the path options need to be prefixed
with "platform/" ('platform/ffe09000.pci/...')
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 44517
This sets 'enable_vlan' and thus uses 802.1q
VLANs, but without tagging on either interface.
Signed-off-by: Claudio Leite <leitec@staticky.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
SVN-Revision: 44509
Toggles the LA bit on the WAN interface.
Signed-off-by: Claudio Leite <leitec@staticky.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
SVN-Revision: 44508
ipq806x target has been upgraded to 3.14. There is no need to maintain
this file anymore.
Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
SVN-Revision: 44505
The watchdog driver already registers a restart notifier, we just have
to enable it in the config and in the DT to fix the "reboot" command.
This is done by integratin the following patch-set:
https://lkml.org/lkml/2015/2/20/610
I'm copy-pasting the description below:
qcom-wdt is currently assuming the presence of a dedicated node in DT
to gets its configuration. However, on msm architecture, the watchdog is
usually part of the timer block. So this patch-set is changing the driver
and slightly enhancing the timer DT bindings to provide the relevant clocks
and interrupts.
Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
SVN-Revision: 44504
Some bootloaders seem to trigger the watchdog during the boot process,
therefore the lack of watchdog driver trigger a reboot a few seconds
after boot. So we'll enable it here to avoid it.
Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
SVN-Revision: 44503
MPIC timers are enabled in the config, however a devicetree clock setting
is missing causing the following error:
/soc@ffe00000/timer@41100: cannot get timer frequency.
/soc@ffe00000/timer@42100: cannot get timer frequency.
This patch adds the missing clock and avoids the error.
It's a functional copy of this code
do_fixup_by_compat_u32(blob, "fsl,mpic",
"clock-frequency", get_bus_freq(0), 1);
in arch/powerpc/cpu/mpc85xx/fdt.c in the u-boot code.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 44501
