Buffalo BHR-4GRV2 is a wired router, based on Qualcomm Atheros
QCA9558.
Ported from ar71xx target.
Specification:
- Qualcomm Atheros QCA9558
- 64 MB of RAM
- 16 MB of Flash
- 5x 10/100/1000 Ethernet
- QCA8337N
- 4x LEDs, 2x keys
- UART header on PCB
- Vcc, TX, RX, GND from LED side
- 115200n8
Flash instruction using factory image:
1. Connect the computer to the LAN port of BHR-4GRV2
2. Connect power cable to BHR-4GRV2 and turn on it
3. Access to "http://192.168.12.1/" and open firmware update
page ("ファームウェア更新")
4. Select the OpenWrt factory image and click update ("更新実行")
button
5. Wait ~120 seconds to complete flashing
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
When checking the outcome of the PHY autonegotiation status, at803x
currently returns false in case the SGMII side is not established.
Due to a hardware-bug, ag71xx needs to fixup the SoCs SGMII side, which
it can't as it is not aware of the link-establishment.
This commit allows to ignore the SGMII side autonegotiation status to
allow ag71xx to do the fixup work.
Signed-off-by: David Bauer <mail@david-bauer.net>
The QCA955X is affected by a hardware bug which causes link-loss of the
SGMII link between SoC and PHY. This happens on change of link-state or
speed.
It is not really known what causes this bug. It definitely occurs when
using a AR8033 Gigabit Ethernet PHY.
Qualcomm solves this Bug in a similar fashion. We need to apply the fix
on a per-device base via platform-data as performing the fixup work will
break connectivity in case the SGMII interface is connected to a Switch.
This bug was first proposed to be fixed by Sven Eckelmann in 2016.
https://patchwork.ozlabs.org/patch/604782/
Based-on-patch-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
Signed-off-by: David Bauer <mail@david-bauer.net>
Adds Support for the TP-LINK CPE510 V2.0 by TP-Link.
The hardware is almost the same as the CPE510 V1.0
Follow the same processes as for the CPE510 V1.0
Signed-off-by: Andrew Cameron <apcameron@softhome.net>
1) Add comments so it's clear why we did things; this may prevent
someone (e.g. me) from sinking time into fixing things that
aren't broken and/or were done for reason.
2) Drop mdio 0 probe/register; we don't use ag1xx mdio bus 0.
3) Cosmetic reording of some code (tested) that makes the defintion
more clear.
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
The CR3000 stock firmware is now irrelevant as it required a now defunct
cloud service. Therefore only build images that use the entire flash
(overwriting stock firwmare-specific partitions that no longer matter),
previously called 'nocloud' images.
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
Refreshed all patches
Remove upstreamed patches.
- 103-MIPS-ath79-fix-register-address-in-ath79_ddr_wb_flus.patch
- 403-mtd_fix_cfi_cmdset_0002_status_check.patch
- 001-4.11-01-mtd-m25p80-consider-max-message-size-in-m25p80_read.patch
- 001-4.15-08-bcm63xx_enet-correct-clock-usage.patch
- 001-4.15-09-bcm63xx_enet-do-not-write-to-random-DMA-channel-on-B.patch
- 900-gen_stats-fix-netlink-stats-padding.patch
Introduce a new backported patch to address ext4 breakage, introduced in 4.9.112
- backport-4.9/500-ext4-fix-check-to-prevent-initializing-reserved-inod.patch
This patch has been slightly altered to compensate for a new helper function
introduced in later kernels.
Also add ARM64_SSBD symbol to ARM64 targets still running kernel 4.9
Compile-tested on: ar71xx, bcm2710
Runtime-tested on: ar71xx
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
The patch was wrongly removed by a kernel version bump to 4.9.105 in
the believe that it was merged upstream thow it wasn't. This lead to
unrecoverable link losses on devices which use those PHYs such as
many ubnt single-port CPEs.
Fixes: 7dca1bae82 (kernel: bump to 4.9.105)
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Add missing definitions for the orange WAN LED on the
TL-WR1043N(D) v4 and v5.
Change the name of a MAC address offset constant to
make it consistent with the format of the
existing constants.
Signed-off-by: Tim Thorpe <tim@tfthorpe.net>
TP-Link Archer C59v2 is a dual-band AC1350 router based on
Qualcomm/Atheros QCA9561+QCA9886 chips.
Specification:
- 775/650/258 MHz (CPU/DDR/AHB)
- 128 MB of RAM (DDR2)
- 16 MB of FLASH (SPI NOR)
- 3T3R 2.4 GHz
- 2T2R 5 GHz
- 5x 10/100 Mbps Ethernet
- USB 2.0 port
- UART header on PCB
Flash instruction:
- via web UI:
1. Download openwrt-ar71xx-generic-archer-c59-v2-squashfs-factory.bin
2. Login to router and open the Advanced tab
3. Navigate to System Tools -> Firmware Upgrade
4. Upload firmware using the Manual Upgrade form
- via TFTP:
1. Set PC to fixed ip address 192.168.0.66
2. Download openwrt-ar71xx-generic-archer-c59-v2-squashfs-factory.bin
and rename it to tp_recovery.bin
3. Start a tftp server with the file tp_recovery.bin in its root directory
4. Turn off the router
5. Press and hold Reset button
6. Turn on router with the reset button pressed and wait ~15 seconds
7. Release the reset button and after a short time
the firmware should be transferred from the tftp server
8. Wait ~30 second to complete recovery.
Signed-off-by: Keith Maika <keithm@aoeex.com>
Qxwlan E750G v8 is based on Qualcomm QCA9344.
Specification:
- 560/450/225 MHz (CPU/DDR/AHB)
- 128 MB of RAM (DDR2)
- 8/16 MB of FLASH (SPI NOR)
- 2T2R 2.4G GHz (AR9344)
- 2x 10/100 Mbps Ethernet (PoE support)
- 2x 10/100/1000 Mbps Ethernet
- 7x LED (6 driven by GPIO)
- 1x button (reset)
- 1x DC jack for main power input (9-48 V)
- UART (J23) and LEDs (J2) headers on PCB
Flash instruction (using U-Boot CLI and tftp server):
- Configure PC with static IP 192.168.1.10 and tftp server.
- Rename "sysupgrade" filename to "firmware.bin" and place it in tftp
server directory.
- Connect PC with one of RJ45 ports, power up the board and press
"enter" key to access U-Boot CLI.
- Use the following command to update the device to OpenWrt: "run lfw".
Flash instruction (using U-Boot web-based recovery):
- Configure PC with static IP 192.168.1.xxx(2-254)/24.
- Connect PC with one of RJ45 ports, press the reset button, power up
the board and keep button pressed for around 6-7 seconds, until LEDs
start flashing.
- Open your browser and enter 192.168.1.1, select "sysupgrade" image
and click the upgrade button.
Signed-off-by: 张鹏 <sd20@qxwlan.com>
Qxwlan E750A v4 is based on Qualcomm QCA9344.
Specification:
- 560/450/225 MHz (CPU/DDR/AHB)
- 128 MB of RAM (DDR2)
- 8/16 MB of FLASH (SPI NOR)
- 2T2R 5G GHz (AR9344)
- 2x 10/100 Mbps Ethernet (one port with PoE support)
- 1x miniPCIe slot (USB 2.0 bus only)
- 7x LED (6 driven by GPIO)
- 1x button (reset)
- 1x DC jack for main power input (9-48 V)
- UART (J23) and LEDs (J2) headers on PCB
Flash instruction (using U-Boot CLI and tftp server):
- Configure PC with static IP 192.168.1.10 and tftp server.
- Rename "sysupgrade" filename to "firmware.bin" and place it in tftp
server directory.
- Connect PC with one of RJ45 ports, power up the board and press
"enter" key to access U-Boot CLI.
- Use the following command to update the device to OpenWrt: "run lfw".
Flash instruction (using U-Boot web-based recovery):
- Configure PC with static IP 192.168.1.xxx(2-254)/24.
- Connect PC with one of RJ45 ports, press the reset button, power up
the board and keep button pressed for around 6-7 seconds, until LEDs
start flashing.
- Open your browser and enter 192.168.1.1, select "sysupgrade" image
and click the upgrade button.
Signed-off-by: 张鹏 <sd20@qxwlan.com>
Qxwlan E558 v2 is based on Qualcomm QCA9558 + AR8327.
Specification:
- 720/600/200 MHz (CPU/DDR/AHB)
- 128 MB of RAM (DDR2)
- 8/16 MB of FLASH (SPI NOR)
- 2T2R 2.4 GHz (QCA9558)
- 3x 10/100/1000 Mbps Ethernet (one port with PoE support)
- 4x miniPCIe slot (USB 2.0 bus only)
- 1x microSIM slot
- 5x LED (4 driven by GPIO)
- 1x button (reset)
- 1x 3-pos switch
- 1x DC jack for main power input (9-48 V)
- UART (JP5) and LEDs (J8) headers on PCB
Flash instruction (using U-Boot CLI and tftp server):
- Configure PC with static IP 192.168.1.10 and tftp server.
- Rename "sysupgrade" filename to "firmware.bin" and place it in tftp
server directory.
- Connect PC with one of RJ45 ports, power up the board and press
"enter" key to access U-Boot CLI.
- Use the following command to update the device to OpenWrt: "run lfw".
Flash instruction (using U-Boot web-based recovery):
- Configure PC with static IP 192.168.1.xxx(2-254)/24.
- Connect PC with one of RJ45 ports, press the reset button, power up
the board and keep button pressed for around 6-7 seconds, until LEDs
start flashing.
- Open your browser and enter 192.168.1.1, select "sysupgrade" image
and click the upgrade button.
Signed-off-by: 张鹏 <sd20@qxwlan.com>
The driver is written in such a way that with a board defintion that
connects a fixed phy, mdio, and switch in a certain way, a kernel oops could
result because of lack of previously probed mdio bus.
This commit allows for easier debugging in this case by casting the
correct blame with serial console messages.
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
It's a little noisier but makes it obvious when the ar7240 switch was
connected to the MDIO bus, and to which phy device (or the failure
to do so).
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
NB: Error only appears with ag71xx debug messages and dynamic printk
enabled. This is probably why no one has caught it before.
Previously phy probe debug messages used old (now wrong) functions
to get the phy name for printing. There was also the chance of
a NULL pointer in the event no phy_device was found.
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
Only build images for straight OpenWrt (using all flash; wipes out
partitions that contain information only important for accessing a
now defunct cloud service with the stock firmware) since the stock
firmware is now irrelevant.
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
The wrong MAC addresses (from the point of view of the physical device
label) were being assigned to the wrong interfaces. Fix that.
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
While the stock firmware and previous ar71xx versions of openwrt used the
single ethernet port as a DHCP client, for unmodified openwrt usage it
makes more sense to do the standard openwrt thing and make the ethernet
port a static lan with known address so that users can find the device on
the network more easily.
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
The Skydog cloud service no longer exists hence supporting going back
to stock firmware with cloud support is no longer applicable.
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
The reset button was incorrectly returning KEY_WPS_BUTTON as the key
code. We want KEY_RESTART., so make that fix.
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
The PCIe wireless MAC address address is better labelled as WMAC
than MAC to emphasize that it is for a wireless interface.
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
81d446b045 introduced incomplete
support for this device.
This patch attempts to correct the situation based on OEM source
code.
LED1-3 are GSM mode on OFW (2G/3G/4G) hence unassigned here.
Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org>
Tested-by: David Ehrmann <ehrmann@gmail.com>
The active_low flag was missing for the user LED. This LED is open drain
(confirmed in OEM source) and open drain only makes sense for active low
GPIOs.
The two wireless LEDs mentioned in the comments are also #defined for
future reference.
Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org>
Tested-by: Ryan Mounce <ryan@mounce.com.au>
e15c63a375 introduced code that was trying
to register GPIO 1 as both an LED and a button. The OEM source makes it
clear that LED1 is not wired to the SoC GPIOs. GPIO 1 is the reset button.
Furthermore the (green) power led default state should also be defined,
(matching OEM source), and it should be used by diag.sh since it's
currently the only software-controllable LED.
This patch fixes these issues and renames the corresponding #defines for
clarity
Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org>
The gpios that control power toggle for USB on the RouterBOARD devices
are active low _off_ switches.
When they are active (low), power is off. When they are inactive
(high), power is on.
Rename GPIO defines, set gpios to GPIOF_ACTIVE_LOW for consistency and
reflect their true action in the display name. This brings openwrt code
in line with OEM.
Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org>
Tested-by: Ryan Mounce <ryan@mounce.com.au>
F9K1115v2 has a kernel partition size of 1408 kB.
Since kernel 4.9.x+ the kernel image for this device compiled had exceeded
the kernel partition size limit and thus failing size check.
The kernel image generated for this device
under ar71xx tiny target is 1329.67 kB < 1408 kB.
Signed-off-by: Kin Chan <kcchan1@outlook.com>
This patch adds support for the MikroTik RB931-2nD (hAP mini):
https://mikrotik.com/product/RB931-2nD
Specifications:
* SoC: Qualcomm QCA9533 (650MHz)
* RAM: 32MiB
* Storage: 16MiB SPI NOR flash
* Ethernet: 3x100M
* Wireless: QCA9533 built-in, dual-chain 802.11b/g/n
Installation:
1. Setup a DHCP/BOOTP Server with the following parameters:
* DHCP-Option 66 (TFTP server name): pointing to a local TFTP
server within the same subnet of the DHCP range
* DHCP-Option 67 (Bootfile-Name): matching the initramfs filename
of the to be booted image. The usable intramfs files are:
- openwrt-ar71xx-mikrotik-vmlinux-initramfs.elf
- openwrt-ar71xx-mikrotik-vmlinux-initramfs-lzma.elf
- openwrt-ar71xx-mikrotik-rb-nor-flash-16M-initramfs-kernel.bin
2. Press the reset button on the board and keep that pressed.
3. Connect the board to your local network via its Internet port.
4. Release the button after the LEDs on the board are turned off.
Now the board should load and start the initramfs image from
the TFTP server.
5. Now connect the board via either of its LAN ports (2 or 3).
6. Upload the sysupgrade image to the board with scp:
$ scp openwrt-ar71xx-mikrotik-rb-nor-flash-16M-squashfs-sysupgrade.bin root@192.168.1.1:/tmp/fw.bin
7. Log in to the running system listening on 192.168.1.1 via ssh
as root (without password):
$ ssh root@192.168.1.1
8. Flash the uploaded firmware file from the ssh session via the
sysupgrade command:
root@OpenWrt:~# sysupgrade /tmp/fw.bin
Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org>
Move boards to the tiny subtarget which break the build if the kernel is
set to "Optimize for performance".
Signed-off-by: Mathias Kresin <dev@kresin.me>
Add a template for safeloader images and include it instead of
overwriting variables defined in the common tp-link build commands.
Split the existing tp-link templates to proper implement the safeloader
template.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Drop the LOADER_TYPE variables in case no loader is used at all or move
the variable to devices which are using a loader.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Use the provided image build variables to point the kernel-bin build
command to the kernel we are interested in.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Use the LOADER_TYPE variable to specify that we need the elf preloader
and append the loader via the corresponding build recipe. It allows to
enable initramfs images again for mikrotik NAND images, which caused a
build error before.
Add the minor header only to the kernel of the sysupgrade images, as it
is only required for the bootloader to find the kernel on flash.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Use the new dynamic partition split in tplink-safeloader so we no longer
have to worry about kernel size increases.
Signed-off-by: Lucian Cristian <lucian.cristian@gmail.com>
This PR adds support for a popular low-cost 2.4GHz N based AP
Specifications:
- SoC: Qualcomm Atheros QCA9533 (650MHz)
- RAM: 64MB
- Storage: 8 MB SPI NOR
- Wireless: 2.4GHz N based built into SoC 2x2
- Ethernet: 1x 100/10 Mbps, integrated into SoC, 24V POE IN
Installation:
Flash factory image through stock firmware WEB UI
or through TFTP
To get to TFTP recovery just hold reset button while powering on for
around 4-5 seconds and release.
Rename factory image to recovery.bin
Stock TFTP server IP:192.168.0.100
Stock device TFTP adress:192.168.0.254
Notes:
TP-Link does not use bootstrap registers so without this patch reference
clock detects as 40MHz while it is actually 25MHz.
This is due to messed up bootstrap resistor configuration on the PCB.
Provided GPL code just forces 25MHz reference clock.
That causes booting with completely wrong clocks, for example, CPU tries
to boot at 1040MHz while the stock is 650MHz.
So this PR depends on PR #672 to remove 40MHz reference clock.
Thanks to Sven Eckelmann <sven@narfation.org> for properly patching that.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
