Commit graph

6 commits

Author SHA1 Message Date
John Crispin
9213fefb4d ar71xx: Add QCA955X GPIO mux and function definitions
Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>

SVN-Revision: 49075
2016-03-23 12:52:31 +00:00
John Crispin
698edbbc32 ar71xx: refresh patches
Signed-off-by: Roman Yeryomin <roman@advem.lv>

SVN-Revision: 47983
2015-12-23 14:45:05 +00:00
John Crispin
67953f30f3 ar71xx: update QCA956x support
- separate qca956x and tp9343 (they use different IDs)
- rename qca9561->qca956x for consistency
- add missing bits (device reset, gpio output select)
- fix wmac setup

Signed-off-by: Roman Yeryomin <roman@advem.lv>

SVN-Revision: 47981
2015-12-23 14:44:44 +00:00
Felix Fietkau
0b296d3808 ar71xx: use correct PLL configuration register bitmask for QCA956x SoC.
Incorrect value causes clock inaccuracy as huge as 1/60.

Signed-off-by: Dmitry Ivanov <dima@ubnt.com>
Signed-off-by: Felix Fietkau <nbd@openwrt.org>

SVN-Revision: 47363
2015-11-02 18:20:51 +00:00
John Crispin
c9426352ce ar71xx: fix ath79_soc_rev value for QCA9531 ver. 2
ath9k expects to get revision id 2 for the QCA9531 ver. 2 rev. 0. This
fixes the very low TX power on some devices like the TP-LINK
TL-WR841ND v10.

As ath79_soc_rev is only used to get the revision number to ath9k on the
QCA9533, just set it to the expected value on the ver. 2.

Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net>
Tested-by: Felix Kaechele <felix@kaechele.ca>

SVN-Revision: 47262
2015-10-26 09:01:34 +00:00
Felix Fietkau
b704d3c96e ar71xx: reorganize 4.1 patch directory layout
Signed-off-by: Felix Fietkau <nbd@openwrt.org>

SVN-Revision: 46430
2015-07-19 17:59:08 +00:00
Renamed from target/linux/ar71xx/patches-4.1/735-MIPS-ath79-add-support-for-QCA956x-SoC.patch (Browse further)