The top half of UARTF on the HLK-RM04 is used for GPIO.
mode 1 mode 2
RIN GPIO14
DSR_N GPIO13
DCD_N GPIO12
DTR_N GPIO11
RXD GPIO10
CTS_N GPIO09
TXD GPIO08
RTS_N GPIO07
This patch applies 3'b101 mode to UARTF:
GPIO14
GPIO13
GPIO12
GPIO11
RXD
CTS_N
TXD
RTS_N
Because the base rt5350.dtsi file forces 3'b000 mode, remove the pin setting from this file and apply it directly to the files that inherit from it (WIZFI630A.dts and WT1520.dtsi). This change makes the rt5350.dtsi file consistent with the mt7620a.dtsi file.
Signed-off-by: John Clark <inindev@gmail.com>
SVN-Revision: 48665
The I2C function of the RT5350 SoC on the HLK-RM04 is used for GPIO1 and GPIO2.
Take note that the I2C_SD pin is GPIO1 on the RT5350 and is exposed on the HLK-RM04 as GPIO0
Likewise the I2C_SCLK pin is GPIO2 on the RT5350 and is exposed on the HLK-RM04 as GPIO1
group mode 1 mode 2 hlk-rm04 pin & export
i2c i2c_sd gpio1 (pin 8, hlk-rm04:gpio0)
i2c i2c_sclk gpio2 (pin 9, hlk-rm04:gpio1)
reference:
http://www.hlktech.net/product_detail.php?ProId=39http://cdn.sparkfun.com/datasheets/Wireless/WiFi/RT5350.pdf
Signed-off-by: John Clark <inindev@gmail.com>
SVN-Revision: 48664
The RESET button of the HLK-RM04 is connected to GPIO0, linux function 0x198
The WPS button of the HLK-RM04 is connected to GPIO14, linux function 0x211
Signed-off-by: John Clark <inindev@gmail.com>
SVN-Revision: 48663
The power LED on the HLK-RM04 is hard wired to the power bus and is not under GPIO control, remove the bogus config for it.
(Note that GPIO0 is actually connected to the RESET button.)
Signed-off-by: John Clark <inindev@gmail.com>
SVN-Revision: 48662
The bootloader was updated and now uses 115200 instead of 57600 baud
for the serial console. Change this also in OpenWrt's DTS, so the rate
is consistent for bootloader and linux kernel output.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
SVN-Revision: 48359
The image name for the HiLink HLK-RM04 module has a typo and should read "RM04" rather than "RM02"
Signed-off-by: John Clark <inindev@gmail.com>
SVN-Revision: 48355
LED's were defined wrong in the device tree file, they are hardware driven because they are connected directly to the switch chip and wireless chips respectively, thus no GPIO addresses are assigned to them. It is safe to remove them from the device tree file to stop confusion.
Signed-off-by: Sebastian Careba <nitroshift@yahoo.com>
SVN-Revision: 48055
Zero config value for default memory region means 'memory', not
not 'disabled' according to 'Control Registers Of The Coherency
Manager' manual.
Signed-off-by: Nikolay Martynov <mar.kolya@gmail.com>
SVN-Revision: 47906
Since now we hopefully setup memory regions properly we no longer need this hack.
Tested and works on ubnt-erx.
Signed-off-by: Nikolay Martynov <mar.kolya@gmail.com>
SVN-Revision: 47905
Only compile tested since I do not have any hardware with
devices on pcie bus.
Signed-off-by: Nikolay Martynov <mar.kolya@gmail.com>
SVN-Revision: 47904
