Some CFEs seem to misconfigure the mapped memory flash access with
fast read but without a dummy byte, causing all accesses to be prefixed
with 0xff.
This of course breaks reading out the nvram, so do not just move back to
single i/o accessors, but also ensure that the dummy byte is correctly
set.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 46707
It looks like RAC flushes cause random corruption(?) when the
second thread is set as default.
Fixes#20160.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 46563
BCM6318: add support for Plusnet / Sagem 2704N (V1)
Signed-off-by: Matt Goring <matt.goring@googlemail.com>
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 46562
Backport a commit from 4.2 making IRQCHIP_DECLARE available outside of
drivers/irqchip and use it.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 46183
Replace the appended dtb patch with the upstream accepted version and
update the code to work with the changed interface.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 46181
Also move it to an earlier place so new boards added are less likely
to confuse quilt.
Fixes#19965.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 46148
