add the 2.6.30 port of the cache workaround patch from #4293 (thx, acoul)

SVN-Revision: 16917
This commit is contained in:
Felix Fietkau 2009-07-19 11:44:54 +00:00
parent c8f178d61a
commit f9df014859

View file

@ -0,0 +1,135 @@
--- a/arch/mips/include/asm/r4kcache.h 2008-12-03 14:06:48.000000000 +0100
+++ b/arch/mips/include/asm/r4kcache.h 2008-12-05 08:16:03.000000000 +0100
@@ -20,10 +20,25 @@
#ifdef CONFIG_BCM47XX
#include <asm/paccess.h>
#include <linux/ssb/ssb.h>
-#define BCM4710_DUMMY_RREG() ((void) *((u8 *) KSEG1ADDR(SSB_ENUM_BASE + SSB_IMSTATE)))
+#define BCM4710_DUMMY_RREG() bcm4710_dummy_rreg()
+
+static inline unsigned long bcm4710_dummy_rreg(void) {
+ return (*(volatile unsigned long *)(KSEG1ADDR(SSB_ENUM_BASE + SSB_IMSTATE)));
+}
+
+#define BCM4710_FILL_TLB(addr) bcm4710_fill_tlb((void*)(addr))
+
+static inline unsigned long bcm4710_fill_tlb(void *addr) {
+ return (*(unsigned long *)addr);
+}
+
+#define BCM4710_PROTECTED_FILL_TLB(addr) bcm4710_protected_fill_tlb((void*)(addr))
+
+static inline void bcm4710_protected_fill_tlb(void *addr) {
+ unsigned long x;
+ get_dbe(x, (unsigned long *)addr);;
+}
-#define BCM4710_FILL_TLB(addr) (*(volatile unsigned long *)(addr))
-#define BCM4710_PROTECTED_FILL_TLB(addr) ({ unsigned long x; get_dbe(x, (volatile unsigned long *)(addr)); })
#else
#define BCM4710_DUMMY_RREG()
--- a/arch/mips/mm/tlbex.c 2008-12-03 17:39:32.000000000 +0100
+++ b/arch/mips/mm/tlbex.c 2008-12-03 17:11:43.000000000 +0100
@@ -547,6 +547,9 @@
#endif
uasm_i_addu(p, ptr, tmp, ptr);
#else
+#ifdef CONFIG_BCM47XX
+ uasm_i_nop(p);
+#endif
UASM_i_LA_mostly(p, ptr, pgdc);
#endif
uasm_i_mfc0(p, tmp, C0_BADVADDR); /* get faulting address */
@@ -677,12 +680,12 @@
/* No need for uasm_i_nop */
}
-#ifdef CONFIG_BCM47XX
- uasm_i_nop(&p);
-#endif
#ifdef CONFIG_64BIT
build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */
#else
+# ifdef CONFIG_BCM47XX
+ uasm_i_nop(&p);
+# endif
build_get_pgde32(&p, K0, K1); /* get pgd in K1 */
#endif
@@ -690,6 +693,9 @@
build_update_entries(&p, K0, K1);
build_tlb_write_entry(&p, &l, &r, tlb_random);
uasm_l_leave(&l, p);
+#ifdef CONFIG_BCM47XX
+ uasm_i_nop(&p);
+#endif
uasm_i_eret(&p); /* return from trap */
#ifdef CONFIG_64BIT
@@ -1087,12 +1093,12 @@
struct uasm_reloc **r, unsigned int pte,
unsigned int ptr)
{
-#ifdef CONFIG_BCM47XX
- uasm_i_nop(p);
-#endif
#ifdef CONFIG_64BIT
build_get_pmde64(p, l, r, pte, ptr); /* get pmd in ptr */
#else
+# ifdef CONFIG_BCM47XX
+ uasm_i_nop(p);
+# endif
build_get_pgde32(p, pte, ptr); /* get pgd in ptr */
#endif
@@ -1120,6 +1126,9 @@
build_update_entries(p, tmp, ptr);
build_tlb_write_entry(p, l, r, tlb_indexed);
uasm_l_leave(l, *p);
+#ifdef CONFIG_BCM47XX
+ uasm_i_nop(p);
+#endif
uasm_i_eret(p); /* return from trap */
#ifdef CONFIG_64BIT
--- a/arch/mips/kernel/genex.S 2008-11-16 15:33:32.000000000 +0100
+++ b/arch/mips/kernel/genex.S 2008-12-05 07:14:52.000000000 +0100
@@ -21,6 +21,19 @@
#include <asm/war.h>
#include <asm/page.h>
+#ifdef CONFIG_BCM47XX
+# ifdef eret
+# undef eret
+# endif
+# define eret \
+ .set push; \
+ .set noreorder; \
+ nop; \
+ nop; \
+ eret; \
+ .set pop;
+#endif
+
#define PANIC_PIC(msg) \
.set push; \
.set reorder; \
@@ -53,7 +66,6 @@
.set noat
#ifdef CONFIG_BCM47XX
nop
- nop
#endif
#if R5432_CP0_INTERRUPT_WAR
mfc0 k0, CP0_INDEX
@@ -78,6 +90,9 @@
.set push
.set mips3
.set noat
+#ifdef CONFIG_BCM47XX
+ nop
+#endif
mfc0 k1, CP0_CAUSE
li k0, 31<<2
andi k1, k1, 0x7c