mvebu: update to 3.8-rc3
Signed-off-by: Florian Fainelli <florian@openwrt.org> SVN-Revision: 35086
This commit is contained in:
Florian Fainelli
parent
548cb59826
commit
ecf230710f
8 changed files with 1 additions and 320 deletions
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@ -1,33 +0,0 @@
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From 7a70ff39328cd24b9c7db11eb4ae1a18c698a538 Mon Sep 17 00:00:00 2001
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From: Florian Fainelli <florian@openwrt.org>
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Date: Mon, 7 Jan 2013 14:26:15 +0100
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Subject: [PATCH] sctp: fix typo in default SCTP cookie choice
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Commit 0d0863b0 (sctp: Change defaults on cookie hmac selection)
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introduced a choice configuration option to select the default SCTP
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cookie hashing algorithm, a typo was introduced for the default choice.
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This is an issue when running make oldconfig because an explicit choice
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number must be entered since no default is available. This patch fixes
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the typo, thus providing a valid default choice.
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Signed-off-by: Florian Fainelli <florian@openwrt.org>
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---
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net/sctp/Kconfig | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/net/sctp/Kconfig b/net/sctp/Kconfig
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index c262106..7521d94 100644
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--- a/net/sctp/Kconfig
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+++ b/net/sctp/Kconfig
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@@ -68,7 +68,7 @@ config SCTP_DBG_OBJCNT
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If unsure, say N
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choice
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prompt "Default SCTP cookie HMAC encoding"
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- default SCTP_COOKIE_HMAC_MD5
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+ default SCTP_DEFAULT_COOKIE_HMAC_MD5
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help
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This option sets the default sctp cookie hmac algorithm
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when in doubt select 'md5'
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--
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1.7.10.4
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@ -13,7 +13,7 @@ FEATURES:=targz usb jffs2 pci pcie gpio
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CFLAGS:=-Os -pipe -march=armv7-a -mfpu=vfpv3-d16 -mfloat-abi=softfp
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MAINTAINER:=Florian Fainelli <florian@openwrt.org>
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LINUX_VERSION:=3.8-rc2
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LINUX_VERSION:=3.8-rc3
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include $(INCLUDE_DIR)/target.mk
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@ -1,28 +0,0 @@
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From: Joshua Coombs <josh.coombs@gmail.com>
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If the Orion WDT driver is built as a module, an opps occurs during
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clk lookup when calling mvebu_clk_gating_get_src(). Remove the
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inappropriate __init tag so the function is available for modules
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after kernel init.
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Signed-off-by: Joshua Coombs <josh.coombs@gmail.com>
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Signed-off-by: Andrew Lunn <andrew@lunn.ch>
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---
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drivers/clk/mvebu/clk-gating-ctrl.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/drivers/clk/mvebu/clk-gating-ctrl.c b/drivers/clk/mvebu/clk-gating-ctrl.c
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index c6d3c26..8fa5408 100644
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--- a/drivers/clk/mvebu/clk-gating-ctrl.c
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+++ b/drivers/clk/mvebu/clk-gating-ctrl.c
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@@ -32,7 +32,7 @@ struct mvebu_soc_descr {
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#define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw)
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-static struct clk __init *mvebu_clk_gating_get_src(
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+static struct clk *mvebu_clk_gating_get_src(
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struct of_phandle_args *clkspec, void *data)
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{
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struct mvebu_gating_ctrl *ctrl = (struct mvebu_gating_ctrl *)data;
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--
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1.7.10.4
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@ -1,38 +0,0 @@
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From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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When mv_xor_channel_add() fails for one XOR channel, we jump to the
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err_channel_add label to clean up all previous channels that had been
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initialized correctly. Unfortunately, while handling this error
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condition, we were disposing the IRQ mapping before calling
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mv_xor_channel_remove() (which does the free_irq()), which is
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incorrect.
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Instead, do things properly in the reverse order of the
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initialization: first remove the XOR channel (so that free_irq() is
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done), and then dispose the IRQ mapping.
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This avoids ugly warnings when for some reason one of the XOR channel
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fails to initialize.
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Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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---
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drivers/dma/mv_xor.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/drivers/dma/mv_xor.c b/drivers/dma/mv_xor.c
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index ac71f55..cc5d23d 100644
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--- a/drivers/dma/mv_xor.c
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+++ b/drivers/dma/mv_xor.c
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@@ -1361,9 +1361,9 @@ static int mv_xor_probe(struct platform_device *pdev)
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err_channel_add:
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for (i = 0; i < MV_XOR_MAX_CHANNELS; i++)
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if (xordev->channels[i]) {
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+ mv_xor_channel_remove(xordev->channels[i]);
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if (pdev->dev.of_node)
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irq_dispose_mapping(xordev->channels[i]->irq);
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- mv_xor_channel_remove(xordev->channels[i]);
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}
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clk_disable_unprepare(xordev->clk);
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--
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1.7.10.4
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@ -1,35 +0,0 @@
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From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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When a channel fails to initialize, we release all ressources,
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including clocks. However, a XOR unit is not necessarily associated to
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a clock (some variants of Marvell SoCs have a clock for XOR units,
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some don't), so we shouldn't unconditionally be releasing the clock.
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Instead, just like we do in the mv_xor_remove() function, we should
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check if one clock was found before releasing it.
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Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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---
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drivers/dma/mv_xor.c | 7 +++++--
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1 file changed, 5 insertions(+), 2 deletions(-)
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diff --git a/drivers/dma/mv_xor.c b/drivers/dma/mv_xor.c
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index cc5d23d..e17fad0 100644
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--- a/drivers/dma/mv_xor.c
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+++ b/drivers/dma/mv_xor.c
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@@ -1366,8 +1366,11 @@ err_channel_add:
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irq_dispose_mapping(xordev->channels[i]->irq);
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}
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- clk_disable_unprepare(xordev->clk);
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- clk_put(xordev->clk);
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+ if (!IS_ERR(xordev->clk)) {
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+ clk_disable_unprepare(xordev->clk);
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+ clk_put(xordev->clk);
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+ }
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+
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return ret;
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}
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--
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1.7.10.4
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@ -1,52 +0,0 @@
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From e84ed03e1c5d45305fdd9b872e0b7be97bcfda16 Mon Sep 17 00:00:00 2001
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From: Gregory CLEMENT <gregory.clement@free-electrons.com>
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Date: Thu, 13 Dec 2012 15:03:27 +0100
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Subject: [PATCH] arm: cache-l2x0: aurora: Invalidate during clean operation
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with WT enable
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This patch fixes a bug for Aurora L2 cache controller when the
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write-through mode is enable. For the clean operation even if we don't
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have to flush the lines we still need to invalidate them.
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Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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---
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arch/arm/mm/cache-l2x0.c | 22 ++++++++++++++--------
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1 file changed, 14 insertions(+), 8 deletions(-)
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diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
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index 6911b8b..7ffe943 100644
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--- a/arch/arm/mm/cache-l2x0.c
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+++ b/arch/arm/mm/cache-l2x0.c
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@@ -505,15 +505,21 @@ static void aurora_clean_range(unsigned long start, unsigned long end)
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static void aurora_flush_range(unsigned long start, unsigned long end)
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{
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- if (!l2_wt_override) {
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- start &= ~(CACHE_LINE_SIZE - 1);
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- end = ALIGN(end, CACHE_LINE_SIZE);
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- while (start != end) {
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- unsigned long range_end = calc_range_end(start, end);
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+ start &= ~(CACHE_LINE_SIZE - 1);
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+ end = ALIGN(end, CACHE_LINE_SIZE);
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+ while (start != end) {
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+ unsigned long range_end = calc_range_end(start, end);
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+ /*
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+ * If L2 is forced to WT, the L2 will always be clean and we
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+ * just need to invalidate.
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+ */
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+ if (l2_wt_override)
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aurora_pa_range(start, range_end - CACHE_LINE_SIZE,
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- AURORA_FLUSH_RANGE_REG);
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- start = range_end;
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- }
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+ AURORA_INVAL_RANGE_REG);
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+ else
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+ aurora_pa_range(start, range_end - CACHE_LINE_SIZE,
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+ AURORA_FLUSH_RANGE_REG);
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+ start = range_end;
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}
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}
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--
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1.7.10.4
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@ -1,45 +0,0 @@
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From 6c8928f877a1572f16cfc8a0c055d7e16320c741 Mon Sep 17 00:00:00 2001
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From: Gregory CLEMENT <gregory.clement@free-electrons.com>
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Date: Thu, 13 Dec 2012 18:33:06 +0100
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Subject: [PATCH] arm: cache-l2x0: aurora: Use writel_relaxed instead of
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writel
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The use of writel instead of writel_relaxed lead to deadlock in some
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situation (SMP on Armada 370 for instance). The use of writel_relaxed
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as it was done in the rest of this driver fixes this bug.
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Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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---
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arch/arm/mm/cache-l2x0.c | 9 +++++----
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1 file changed, 5 insertions(+), 4 deletions(-)
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diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
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index 7ffe943..96a1ae4 100644
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--- a/arch/arm/mm/cache-l2x0.c
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+++ b/arch/arm/mm/cache-l2x0.c
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@@ -459,8 +459,8 @@ static void aurora_pa_range(unsigned long start, unsigned long end,
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unsigned long flags;
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raw_spin_lock_irqsave(&l2x0_lock, flags);
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- writel(start, l2x0_base + AURORA_RANGE_BASE_ADDR_REG);
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- writel(end, l2x0_base + offset);
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+ writel_relaxed(start, l2x0_base + AURORA_RANGE_BASE_ADDR_REG);
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+ writel_relaxed(end, l2x0_base + offset);
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raw_spin_unlock_irqrestore(&l2x0_lock, flags);
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cache_sync();
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@@ -674,8 +674,9 @@ static void pl310_resume(void)
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static void aurora_resume(void)
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{
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if (!(readl(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) {
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- writel(l2x0_saved_regs.aux_ctrl, l2x0_base + L2X0_AUX_CTRL);
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- writel(l2x0_saved_regs.ctrl, l2x0_base + L2X0_CTRL);
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+ writel_relaxed(l2x0_saved_regs.aux_ctrl,
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+ l2x0_base + L2X0_AUX_CTRL);
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+ writel_relaxed(l2x0_saved_regs.ctrl, l2x0_base + L2X0_CTRL);
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}
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}
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--
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1.7.10.4
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@ -1,88 +0,0 @@
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From 3487b074a742bc3300683e91e3ade383b659fbe9 Mon Sep 17 00:00:00 2001
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From: Gregory CLEMENT <gregory.clement@free-electrons.com>
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Date: Tue, 4 Dec 2012 18:04:59 +0100
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Subject: [PATCH] arm: mvebu: Use dw-apb-uart instead of ns16650 as UART
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driver
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The UART controller used in the Armada 370 and Armada XP SoCs is the
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Synopsys DesignWare 8250 (aka Synopsys DesignWare ABP UART). The
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improper use of the ns16550 can lead to a kernel oops during boot if
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a character is sent to the UART before the initialization of the
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driver. The DW APB has an extra interrupt that gets raised when
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writing to the LCR when busy. This explains why we need to use
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dw-apb-uart driver to handle this.
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Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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---
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arch/arm/boot/dts/armada-370-xp.dtsi | 6 ++++--
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arch/arm/boot/dts/armada-xp.dtsi | 6 ++++--
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arch/arm/configs/mvebu_defconfig | 1 +
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3 files changed, 9 insertions(+), 4 deletions(-)
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diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi
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index cf6c48a..4c0abe8 100644
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--- a/arch/arm/boot/dts/armada-370-xp.dtsi
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+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
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@@ -50,17 +50,19 @@
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ranges;
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serial@d0012000 {
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- compatible = "ns16550";
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+ compatible = "snps,dw-apb-uart";
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reg = <0xd0012000 0x100>;
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reg-shift = <2>;
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interrupts = <41>;
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+ reg-io-width = <4>;
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status = "disabled";
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};
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serial@d0012100 {
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- compatible = "ns16550";
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+ compatible = "snps,dw-apb-uart";
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reg = <0xd0012100 0x100>;
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reg-shift = <2>;
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interrupts = <42>;
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+ reg-io-width = <4>;
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status = "disabled";
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};
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diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi
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index 367aa3f..8a85ffe 100644
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--- a/arch/arm/boot/dts/armada-xp.dtsi
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+++ b/arch/arm/boot/dts/armada-xp.dtsi
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@@ -42,17 +42,19 @@
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soc {
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serial@d0012200 {
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- compatible = "ns16550";
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+ compatible = "snps,dw-apb-uart";
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reg = <0xd0012200 0x100>;
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reg-shift = <2>;
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interrupts = <43>;
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+ reg-io-width = <4>;
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status = "disabled";
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};
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serial@d0012300 {
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- compatible = "ns16550";
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+ compatible = "snps,dw-apb-uart";
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reg = <0xd0012300 0x100>;
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reg-shift = <2>;
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interrupts = <44>;
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+ reg-io-width = <4>;
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status = "disabled";
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};
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diff --git a/arch/arm/configs/mvebu_defconfig b/arch/arm/configs/mvebu_defconfig
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index a702fb3..3ba35f1 100644
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--- a/arch/arm/configs/mvebu_defconfig
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+++ b/arch/arm/configs/mvebu_defconfig
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@@ -34,6 +34,7 @@ CONFIG_MARVELL_PHY=y
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CONFIG_SERIAL_8250=y
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CONFIG_SERIAL_8250_CONSOLE=y
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CONFIG_SERIAL_OF_PLATFORM=y
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+CONFIG_SERIAL_8250_DW=y
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CONFIG_I2C=y
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CONFIG_I2C_MV64XXX=y
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CONFIG_GPIOLIB=y
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--
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1.7.10.4
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