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mostly cosmetic sync with the mainline bubinga code

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SVN-Revision: 7917
This commit is contained in:
Imre Kaloz 2007-07-11 13:13:26 +00:00
parent 4db7fa1c06
commit ec4086cab0
2 changed files with 10 additions and 10 deletions
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17
target/linux/magicbox-2.6/files/arch/ppc/platforms/4xx/magicbox.c
View file

@ -13,7 +13,6 @@
* or implied. * or implied.
*/ */
#include <linux/autoconf.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/smp.h> #include <linux/smp.h>
#include <linux/threads.h> #include <linux/threads.h>
@ -51,7 +50,7 @@
extern bd_t __res; extern bd_t __res;
/* Some IRQs unique to board /* Some IRQs unique to the board
* Used by the generic 405 PCI setup functions in ppc4xx_pci.c * Used by the generic 405 PCI setup functions in ppc4xx_pci.c
*/ */
int __init int __init
@ -73,7 +72,6 @@ ppc405_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
return PCI_IRQ_TABLE_LOOKUP; return PCI_IRQ_TABLE_LOOKUP;
}; };
/* The serial clock for the chip is an internal clock determined by /* The serial clock for the chip is an internal clock determined by
* different clock speeds/dividers. * different clock speeds/dividers.
* Calculate the proper input baud rate and setup the serial driver. * Calculate the proper input baud rate and setup the serial driver.
@ -100,8 +98,8 @@ magicbox_early_serial_map(void)
port.irq = ACTING_UART0_INT; port.irq = ACTING_UART0_INT;
port.uartclk = uart_clock; port.uartclk = uart_clock;
port.regshift = 0; port.regshift = 0;
port.iotype = SERIAL_IO_MEM; port.iotype = UPIO_MEM;
port.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST; port.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
port.line = 0; port.line = 0;
if (early_serial_setup(&port) != 0) { if (early_serial_setup(&port) != 0) {
@ -120,6 +118,8 @@ magicbox_early_serial_map(void)
void __init void __init
bios_fixup(struct pci_controller *hose, struct pcil0_regs *pcip) bios_fixup(struct pci_controller *hose, struct pcil0_regs *pcip)
{ {
#ifdef CONFIG_PCI
unsigned int bar_response, bar; unsigned int bar_response, bar;
/* /*
* Expected PCI mapping: * Expected PCI mapping:
@ -199,7 +199,7 @@ bios_fixup(struct pci_controller *hose, struct pcil0_regs *pcip)
hose->first_busno, PCI_SLOT(hose->first_busno), hose->first_busno, PCI_SLOT(hose->first_busno),
PCI_FUNC(hose->first_busno), bar, bar_response); PCI_FUNC(hose->first_busno), bar, bar_response);
} }
/* end work arround */ /* end workaround */
#ifdef DEBUG #ifdef DEBUG
printk("PCI bridge regs after fixup \n"); printk("PCI bridge regs after fixup \n");
@ -214,7 +214,8 @@ bios_fixup(struct pci_controller *hose, struct pcil0_regs *pcip)
printk(" ptm2ms\t0x%x\n", in_le32(&(pcip->ptm2ms))); printk(" ptm2ms\t0x%x\n", in_le32(&(pcip->ptm2ms)));
printk(" ptm2la\t0x%x\n", in_le32(&(pcip->ptm2la))); printk(" ptm2la\t0x%x\n", in_le32(&(pcip->ptm2la)));
#endif /* DEBUG */ #endif
#endif
} }
static struct resource magicbox_flash_resource = { static struct resource magicbox_flash_resource = {
@ -292,5 +293,5 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
#ifdef CONFIG_KGDB #ifdef CONFIG_KGDB
ppc_md.early_serial_map = bubinga_early_serial_map; ppc_md.early_serial_map = bubinga_early_serial_map;
#endif #endif
} }

3
target/linux/magicbox-2.6/files/arch/ppc/platforms/4xx/magicbox.h
View file

@ -17,7 +17,6 @@
#ifndef __MAGICBOX_H__ #ifndef __MAGICBOX_H__
#define __MAGICBOX_H__ #define __MAGICBOX_H__
#include <linux/autoconf.h>
#include <platforms/4xx/ibm405ep.h> #include <platforms/4xx/ibm405ep.h>
#include <asm/ppcboot.h> #include <asm/ppcboot.h>
@ -30,7 +29,7 @@
* for typical configurations at various CPU speeds. * for typical configurations at various CPU speeds.
* The base baud is calculated as (FWDA / EXT UART DIV / 16) * The base baud is calculated as (FWDA / EXT UART DIV / 16)
*/ */
#define BASE_BAUD 0 #define BASE_BAUD 0
/* Flash */ /* Flash */
#define PPC40x_FPGA_BASE 0xF0300000 #define PPC40x_FPGA_BASE 0xF0300000