mpc85xx: fix mpc8548 support (reorder serial ports, add default stdout path to device tree), enable pcie
SVN-Revision: 25015
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6cf6302a78
commit
d6d301bb14
2 changed files with 42 additions and 1 deletions
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@ -170,7 +170,10 @@ CONFIG_PAGEFLAGS_EXTENDED=y
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CONFIG_PAGE_OFFSET=0xc0000000
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# CONFIG_PARTITION_ADVANCED is not set
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CONFIG_PCI=y
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# CONFIG_PCIEPORTBUS is not set
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CONFIG_PCIEAER=y
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CONFIG_PCIEASPM=y
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# CONFIG_PCIEASPM_DEBUG is not set
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CONFIG_PCIEPORTBUS=y
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CONFIG_PCI_DOMAINS=y
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CONFIG_PHYLIB=y
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CONFIG_PHYSICAL_ALIGN=0x04000000
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38
target/linux/mpc85xx/patches/110-fix_mpc8548_cds.patch
Normal file
38
target/linux/mpc85xx/patches/110-fix_mpc8548_cds.patch
Normal file
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@ -0,0 +1,38 @@
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--- a/arch/powerpc/boot/dts/mpc8548cds.dts
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+++ b/arch/powerpc/boot/dts/mpc8548cds.dts
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@@ -308,21 +308,21 @@
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};
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};
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- serial0: serial@4500 {
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- cell-index = <0>;
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+ serial0: serial@4600 {
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+ cell-index = <1>;
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device_type = "serial";
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compatible = "ns16550";
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- reg = <0x4500 0x100>; // reg base, size
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+ reg = <0x4600 0x100>; // reg base, size
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clock-frequency = <0>; // should we fill in in uboot?
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interrupts = <42 2>;
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interrupt-parent = <&mpic>;
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};
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- serial1: serial@4600 {
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- cell-index = <1>;
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+ serial1: serial@4500 {
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+ cell-index = <0>;
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device_type = "serial";
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compatible = "ns16550";
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- reg = <0x4600 0x100>; // reg base, size
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+ reg = <0x4500 0x100>; // reg base, size
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clock-frequency = <0>; // should we fill in in uboot?
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interrupts = <42 2>;
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interrupt-parent = <&mpic>;
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@@ -564,4 +564,7 @@
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0x0 0x100000>;
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};
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};
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+ chosen {
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+ linux,stdout-path = "/soc8548@e0000000/serial@4600";
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+ };
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};
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