archs38: add HSDK board
Synopsys DesignWare HSDK (which stands for ARC HS Development Kit) is the latest and greatest development platform that sports quad-core ARC HS38 in real silicon. Most noticeable features of the board are: * Quad-core ARC HS38 CPU running at 1GHz * 4Gb of DDR * Built-in Vivante GPU (well supported via open source Etnaviv drivers) * Built-in Wi-Fi/Bluetooth module (RedPine RS-9113) And as usual we have: * [micro] SD-card slot * 2 USB 2.0 ports * 1Gbit Ethernet port * Built-in Digilent JTAG probe * Serial port accessible via micro-USB port For more information about HSDK board visit: https://www.synopsys.com/dw/ipdir.php?ds=arc-hs-development-kit Signed-off-by: Evgeniy Didin <Evgeniy.Didin@synopsys.com> CC: Alexey Brodkin <abrodkin@synopsys.com> CC: Hauke Mehrtens <hauke@hauke-m.de> CC: John Crispin <john@phrozen.org>
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0a1a672e95
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3 changed files with 38 additions and 4 deletions
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@ -40,12 +40,13 @@ CONFIG_ARC_PLAT_AXS10X=y
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# CONFIG_ARC_PLAT_EZNPS is not set
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# CONFIG_ARC_PLAT_TB10X is not set
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# CONFIG_ARC_SMP_HALT_ON_RESET is not set
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# CONFIG_ARC_SOC_HSDK is not set
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CONFIG_ARC_SOC_HSDK=y
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CONFIG_ARC_TIMERS=y
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CONFIG_ARC_TIMERS_64BIT=y
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CONFIG_ARC_UBOOT_SUPPORT=y
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CONFIG_AXS103=y
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CONFIG_CLKDEV_LOOKUP=y
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CONFIG_CLK_HSDK=y
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CONFIG_CLONE_BACKWARDS=y
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CONFIG_COMMON_CLK=y
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# CONFIG_CPU_BIG_ENDIAN is not set
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@ -119,7 +120,7 @@ CONFIG_JBD2=y
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CONFIG_KALLSYMS=y
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CONFIG_KERNEL_GZIP=y
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CONFIG_LIBFDT=y
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CONFIG_LINUX_LINK_BASE=0x80000000
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CONFIG_LINUX_LINK_BASE=0x90000000
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CONFIG_LINUX_RAM_BASE=0x80000000
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CONFIG_LOCK_SPIN_ON_OWNER=y
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CONFIG_MDIO_BUS=y
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@ -152,6 +153,7 @@ CONFIG_NET_PTP_CLASSIFY=y
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# CONFIG_NET_VENDOR_SEEQ is not set
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# CONFIG_NET_VENDOR_VIA is not set
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# CONFIG_NET_VENDOR_WIZNET is not set
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CONFIG_NLS=y
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CONFIG_NO_BOOTMEM=y
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CONFIG_NO_IOPORT_MAP=y
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CONFIG_NR_CPUS=4
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@ -182,6 +184,7 @@ CONFIG_RCU_STALL_COMMON=y
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CONFIG_REGMAP=y
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CONFIG_REGMAP_MMIO=y
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CONFIG_RESET_CONTROLLER=y
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CONFIG_RESET_HSDK=y
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CONFIG_RFS_ACCEL=y
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CONFIG_RPS=y
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# CONFIG_SCHED_INFO is not set
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@ -33,8 +33,8 @@ TARGET_DEVICES += nsim_hs
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endif
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# Root FS on SD-card
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KERNEL_LOADADDR := 0x80000000
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DEVICE_DTS_LIST:= axs103_idu nsim_hs_idu
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KERNEL_LOADADDR := 0x90000000
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DEVICE_DTS_LIST:= axs103_idu nsim_hs_idu hsdk
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FAT32_BLOCK_SIZE=1024
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FAT32_BLOCKS=$(shell echo $$(($(CONFIG_AXS10X_SD_BOOT_PARTSIZE)*1024*1024/$(FAT32_BLOCK_SIZE))))
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@ -49,9 +49,11 @@ define Image/Build/SDCard
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rm -f $(KDIR_TMP)/$(IMG_PREFIX)-$(PROFILE)-boot.img
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mkfs.fat $(KDIR_TMP)/$(IMG_PREFIX)-$(PROFILE)-boot.img -C $(FAT32_BLOCKS)
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mkimage -C none -A arc -T script -d uEnv.txt $(BIN_DIR)/uEnv.scr
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mkenvimage -s 0x4000 -o $(BIN_DIR)/uboot.env ./uboot.env.txt
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mcopy -i $(KDIR_TMP)/$(IMG_PREFIX)-$(PROFILE)-boot.img $(BIN_DIR)/uEnv.scr ::boot.scr
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mcopy -i $(KDIR_TMP)/$(IMG_PREFIX)-$(PROFILE)-boot.img $(DTS_DIR)/*.dtb ::
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mcopy -i $(KDIR_TMP)/$(IMG_PREFIX)-$(PROFILE)-boot.img $(BIN_DIR)/$(IMG_PREFIX)-uImage ::uImage
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mcopy -i $(KDIR_TMP)/$(IMG_PREFIX)-$(PROFILE)-boot.img $(BIN_DIR)/uboot.env ::uboot.env
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./gen_axs10x_sdcard_img.sh \
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$(BIN_DIR)/$(IMG_PREFIX)-$(PROFILE)-sdcard-vfat-$(1).img \
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29
target/linux/archs38/image/uboot.env.txt
Normal file
29
target/linux/archs38/image/uboot.env.txt
Normal file
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@ -0,0 +1,29 @@
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baudrate=115200
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bootargs=console=ttyS0,115200n8 root=/dev/mmcblk0p2 rootwait
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bootcmd=fatload mmc 0:1 0x82000000 uImage && fatload mmc 0:1 0x81000000 hsdk.dtb && bootm 0x82000000 - 0x81000000
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bootdelay=2
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bootfile=uImage
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loadaddr=0x82000000
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stderr=serial0@f0005000
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stdin=serial0@f0005000
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stdout=serial0@f0005000
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core_dccm_0=0x10
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core_dccm_1=0x6
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core_dccm_2=0x10
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core_dccm_3=0x6
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core_iccm_0=0x10
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core_iccm_1=0x6
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core_iccm_2=0x10
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core_iccm_3=0x6
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core_mask=0xF
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dcache_ena=0x1
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icache_ena=0x1
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non_volatile_limit=0xE
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hsdk_hs34=setenv core_mask 0x2; setenv icache_ena 0x0; setenv dcache_ena 0x0; setenv core_iccm_1 0x7; setenv core_dccm_1 0x8; setenv non_volatile_limit 0x0;
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hsdk_hs36=setenv core_mask 0x1; setenv icache_ena 0x1; setenv dcache_ena 0x1; setenv core_iccm_0 0x10; setenv core_dccm_0 0x10; setenv non_volatile_limit 0xE;
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hsdk_hs36_ccm=setenv core_mask 0x2; setenv icache_ena 0x1; setenv dcache_ena 0x1; setenv core_iccm_1 0x7; setenv core_dccm_1 0x8; setenv non_volatile_limit 0xE;
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hsdk_hs38=setenv core_mask 0x1; setenv icache_ena 0x1; setenv dcache_ena 0x1; setenv core_iccm_0 0x10; setenv core_dccm_0 0x10; setenv non_volatile_limit 0xE;
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hsdk_hs38_ccm=setenv core_mask 0x2; setenv icache_ena 0x1; setenv dcache_ena 0x1; setenv core_iccm_1 0x7; setenv core_dccm_1 0x8; setenv non_volatile_limit 0xE;
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hsdk_hs38x2=setenv core_mask 0x3; setenv icache_ena 0x1; setenv dcache_ena 0x1; setenv core_iccm_0 0x10; setenv core_dccm_0 0x10; setenv non_volatile_limit 0xE; setenv core_iccm_1 0x6; setenv core_dccm_1 0x6;
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hsdk_hs38x3=setenv core_mask 0x7; setenv icache_ena 0x1; setenv dcache_ena 0x1; setenv core_iccm_0 0x10; setenv core_dccm_0 0x10; setenv non_volatile_limit 0xE; setenv core_iccm_1 0x6; setenv core_dccm_1 0x6; setenv core_iccm_2 0x10; setenv core_dccm_2 0x10;
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hsdk_hs38x4=setenv core_mask 0xF; setenv icache_ena 0x1; setenv dcache_ena 0x1; setenv core_iccm_0 0x10; setenv core_dccm_0 0x10; setenv non_volatile_limit 0xE; setenv core_iccm_1 0x6; setenv core_dccm_1 0x6; setenv core_iccm_2 0x10; setenv core_dccm_2 0x10; setenv core_iccm_3 0x6; setenv core_dccm_3 0x6;
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