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gemini: add support for 3.3

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SVN-Revision: 31698
This commit is contained in:
Gabor Juhos 2012-05-13 12:03:59 +00:00
parent 9cc9e8b608
commit d0ac4c1f03
18 changed files with 4910 additions and 0 deletions
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147
target/linux/gemini/config-3.3 Normal file
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@ -0,0 +1,147 @@
CONFIG_ALIGNMENT_TRAP=y
CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y
CONFIG_ARCH_GEMINI=y
CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
CONFIG_ARCH_NR_GPIO=0
# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
CONFIG_ARCH_REQUIRE_GPIOLIB=y
# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
# CONFIG_ARCH_SUPPORTS_MSI is not set
CONFIG_ARCH_USES_GETTIMEOFFSET=y
CONFIG_ARM=y
# CONFIG_ARM_CPU_SUSPEND is not set
CONFIG_ARM_L1_CACHE_SHIFT=5
CONFIG_ARM_NR_BANKS=8
CONFIG_ARM_PATCH_PHYS_VIRT=y
# CONFIG_ARPD is not set
CONFIG_ATA=m
CONFIG_BCMA_POSSIBLE=y
# CONFIG_CACHE_L2X0 is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,19200 mem=32M"
CONFIG_CMDLINE_FROM_BOOTLOADER=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_EV4=y
# CONFIG_CPU_BPREDICT_DISABLE is not set
CONFIG_CPU_CACHE_FA=y
CONFIG_CPU_CACHE_VIVT=y
CONFIG_CPU_COPY_FA=y
CONFIG_CPU_CP15=y
CONFIG_CPU_CP15_MMU=y
# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
CONFIG_CPU_FA526=y
# CONFIG_CPU_ICACHE_DISABLE is not set
CONFIG_CPU_PABRT_LEGACY=y
CONFIG_CPU_TLB_FA=y
CONFIG_CPU_USE_DOMAINS=y
# CONFIG_DEBUG_USER is not set
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DLCI=m
CONFIG_DLCI_MAX=8
CONFIG_DMADEVICES=y
CONFIG_DNOTIFY=y
# CONFIG_DSCC4 is not set
# CONFIG_FARSYNC is not set
CONFIG_FRAME_POINTER=y
CONFIG_GEMINI_MEM_SWAP=y
CONFIG_GEMINI_NET_ENGINE_GMAC=y
CONFIG_GEMINI_WATCHDOG=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_BUG=y
# CONFIG_GENERIC_CPU_DEVICES is not set
CONFIG_GENERIC_GPIO=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_SYSFS=y
# CONFIG_HAMRADIO is not set
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAVE_AOUT=y
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_HAVE_ARCH_PFN_VALID=y
CONFIG_HAVE_C_RECORDMCOUNT=y
CONFIG_HAVE_DMA_API_DEBUG=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_HAVE_GENERIC_HARDIRQS=y
CONFIG_HAVE_IDE=y
CONFIG_HAVE_IRQ_WORK=y
CONFIG_HAVE_KERNEL_GZIP=y
CONFIG_HAVE_KERNEL_LZMA=y
CONFIG_HAVE_KERNEL_LZO=y
CONFIG_HAVE_KERNEL_XZ=y
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
CONFIG_HAVE_MEMBLOCK=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_HAVE_PROC_CPU=y
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
CONFIG_HAVE_SPARSE_IRQ=y
CONFIG_HDLC=m
CONFIG_HDLC_CISCO=m
CONFIG_HDLC_FR=m
CONFIG_HDLC_PPP=m
CONFIG_HDLC_RAW=m
CONFIG_HWMON=y
# CONFIG_HWMON_DEBUG_CHIP is not set
CONFIG_HW_RANDOM=y
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_CHARDEV=y
# CONFIG_I2C_PXA_PCI is not set
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_PIMSM_V1=y
CONFIG_IP_PIMSM_V2=y
CONFIG_KTIME_SCALAR=y
# CONFIG_LEDS_GPIO is not set
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
CONFIG_MACH_NAS4220B=y
CONFIG_MACH_RUT100=y
CONFIG_MACH_WBD111=y
CONFIG_MACH_WBD222=y
CONFIG_MDIO_BITBANG=y
CONFIG_MDIO_BOARDINFO=y
CONFIG_MDIO_GPIO=y
CONFIG_MIGHT_HAVE_PCI=y
# CONFIG_MLX4_CORE is not set
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_REDBOOT_PARTS=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_PER_CPU_KM=y
CONFIG_NLS=m
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PAGE_OFFSET=0xC0000000
CONFIG_PCI=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PHYLIB=y
# CONFIG_PREEMPT_RCU is not set
# CONFIG_QUOTACTL is not set
CONFIG_SCSI=m
CONFIG_SCSI_MOD=m
# CONFIG_SCSI_MULTI_LUN is not set
# CONFIG_SENSORS_SCH56XX_COMMON is not set
CONFIG_SPLIT_PTLOCK_CPUS=999999
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_UID16=y
CONFIG_USB=m
CONFIG_USB_ARCH_HAS_XHCI=y
CONFIG_USB_COMMON=m
# CONFIG_USB_EHCI_HCD is not set
CONFIG_USB_SUPPORT=y
# CONFIG_USB_UHCI_HCD is not set
CONFIG_VECTORS_BASE=0xffff0000
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_WAN=y
CONFIG_XZ_DEC=y
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZONE_DMA_FLAG=0

11
target/linux/gemini/patches-3.3/001-gemini-fix-gpio_set_irq_type.patch Normal file
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@ -0,0 +1,11 @@
--- a/arch/arm/mach-gemini/gpio.c
+++ b/arch/arm/mach-gemini/gpio.c
@@ -120,7 +120,7 @@ static int gpio_set_irq_type(struct irq_
__raw_writel(reg_level, base + GPIO_INT_LEVEL);
__raw_writel(reg_both, base + GPIO_INT_BOTH_EDGE);
- gpio_ack_irq(d->irq);
+ gpio_ack_irq(d);
return 0;
}

23
target/linux/gemini/patches-3.3/002-arm-gemini-fix-platform_register_rtc-prototype.patch Normal file
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@ -0,0 +1,23 @@
--- a/arch/arm/mach-gemini/common.h
+++ b/arch/arm/mach-gemini/common.h
@@ -18,9 +18,9 @@ extern void gemini_map_io(void);
extern void gemini_init_irq(void);
extern void gemini_timer_init(void);
extern void gemini_gpio_init(void);
-extern void platform_register_rtc(void);
/* Common platform devices registration functions */
+extern int platform_register_rtc(void);
extern int platform_register_uart(void);
extern int platform_register_pflash(unsigned int size,
struct mtd_partition *parts,
--- a/arch/arm/mach-gemini/devices.c
+++ b/arch/arm/mach-gemini/devices.c
@@ -17,6 +17,7 @@
#include <mach/irqs.h>
#include <mach/hardware.h>
#include <mach/global_reg.h>
+#include "common.h"
static struct plat_serial8250_port serial_platform_data[] = {
{

410
target/linux/gemini/patches-3.3/110-watchdog-add-gemini_wdt-driver.patch Normal file
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@ -0,0 +1,410 @@
--- /dev/null
+++ b/drivers/watchdog/gemini_wdt.c
@@ -0,0 +1,378 @@
+/*
+ * Watchdog driver for Cortina Systems Gemini SoC
+ *
+ * Copyright (C) 2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/fs.h>
+#include <linux/uaccess.h>
+#include <linux/miscdevice.h>
+#include <linux/platform_device.h>
+#include <linux/watchdog.h>
+#include <linux/slab.h>
+
+#define GEMINI_WDCOUNTER 0x0
+#define GEMINI_WDLOAD 0x4
+#define GEMINI_WDRESTART 0x8
+
+#define WDRESTART_MAGIC 0x5AB9
+
+#define GEMINI_WDCR 0xC
+
+#define WDCR_CLOCK_5MHZ (1 << 4)
+#define WDCR_SYS_RST (1 << 1)
+#define WDCR_ENABLE (1 << 0)
+
+#define WDT_CLOCK 5000000 /* 5 MHz */
+#define WDT_DEFAULT_TIMEOUT 13
+#define WDT_MAX_TIMEOUT (0xFFFFFFFF / WDT_CLOCK)
+
+/* status bits */
+#define WDT_ACTIVE 0
+#define WDT_OK_TO_CLOSE 1
+
+static unsigned int timeout = WDT_DEFAULT_TIMEOUT;
+static int nowayout = WATCHDOG_NOWAYOUT;
+
+static DEFINE_SPINLOCK(gemini_wdt_lock);
+
+static struct platform_device *gemini_wdt_dev;
+
+struct gemini_wdt_struct {
+ struct resource *res;
+ struct device *dev;
+ void __iomem *base;
+ unsigned long status;
+};
+
+static struct watchdog_info gemini_wdt_info = {
+ .identity = "Gemini watchdog",
+ .options = WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING |
+ WDIOF_SETTIMEOUT,
+};
+
+/* Disable the watchdog. */
+static void gemini_wdt_stop(struct gemini_wdt_struct *gemini_wdt)
+{
+ spin_lock(&gemini_wdt_lock);
+
+ __raw_writel(0, gemini_wdt->base + GEMINI_WDCR);
+
+ clear_bit(WDT_ACTIVE, &gemini_wdt->status);
+
+ spin_unlock(&gemini_wdt_lock);
+}
+
+/* Service the watchdog */
+static void gemini_wdt_service(struct gemini_wdt_struct *gemini_wdt)
+{
+ __raw_writel(WDRESTART_MAGIC, gemini_wdt->base + GEMINI_WDRESTART);
+}
+
+/* Enable and reset the watchdog. */
+static void gemini_wdt_start(struct gemini_wdt_struct *gemini_wdt)
+{
+ spin_lock(&gemini_wdt_lock);
+
+ __raw_writel(timeout * WDT_CLOCK, gemini_wdt->base + GEMINI_WDLOAD);
+
+ gemini_wdt_service(gemini_wdt);
+
+ /* set clock before enabling */
+ __raw_writel(WDCR_CLOCK_5MHZ | WDCR_SYS_RST,
+ gemini_wdt->base + GEMINI_WDCR);
+
+ __raw_writel(WDCR_CLOCK_5MHZ | WDCR_SYS_RST | WDCR_ENABLE,
+ gemini_wdt->base + GEMINI_WDCR);
+
+ set_bit(WDT_ACTIVE, &gemini_wdt->status);
+
+ spin_unlock(&gemini_wdt_lock);
+}
+
+/* Watchdog device is opened, and watchdog starts running. */
+static int gemini_wdt_open(struct inode *inode, struct file *file)
+{
+ struct gemini_wdt_struct *gemini_wdt = platform_get_drvdata(gemini_wdt_dev);
+
+ if (test_bit(WDT_ACTIVE, &gemini_wdt->status))
+ return -EBUSY;
+
+ file->private_data = gemini_wdt;
+
+ gemini_wdt_start(gemini_wdt);
+
+ return nonseekable_open(inode, file);
+}
+
+/* Close the watchdog device. */
+static int gemini_wdt_close(struct inode *inode, struct file *file)
+{
+ struct gemini_wdt_struct *gemini_wdt = file->private_data;
+
+ /* Disable the watchdog if possible */
+ if (test_bit(WDT_OK_TO_CLOSE, &gemini_wdt->status))
+ gemini_wdt_stop(gemini_wdt);
+ else
+ dev_warn(gemini_wdt->dev, "Device closed unexpectedly - timer will not stop\n");
+
+ return 0;
+}
+
+/* Handle commands from user-space. */
+static long gemini_wdt_ioctl(struct file *file, unsigned int cmd,
+ unsigned long arg)
+{
+ struct gemini_wdt_struct *gemini_wdt = file->private_data;
+
+ int value;
+
+ switch (cmd) {
+ case WDIOC_KEEPALIVE:
+ gemini_wdt_service(gemini_wdt);
+ return 0;
+
+ case WDIOC_GETSUPPORT:
+ return copy_to_user((struct watchdog_info *)arg, &gemini_wdt_info,
+ sizeof(gemini_wdt_info)) ? -EFAULT : 0;
+
+ case WDIOC_SETTIMEOUT:
+ if (get_user(value, (int *)arg))
+ return -EFAULT;
+
+ if ((value < 1) || (value > WDT_MAX_TIMEOUT))
+ return -EINVAL;
+
+ timeout = value;
+
+ /* restart wdt to use new timeout */
+ gemini_wdt_stop(gemini_wdt);
+ gemini_wdt_start(gemini_wdt);
+
+ /* Fall through */
+ case WDIOC_GETTIMEOUT:
+ return put_user(timeout, (int *)arg);
+
+ case WDIOC_GETTIMELEFT:
+ value = __raw_readl(gemini_wdt->base + GEMINI_WDCOUNTER);
+ return put_user(value / WDT_CLOCK, (int *)arg);
+
+ default:
+ return -ENOTTY;
+ }
+}
+
+/* Refresh the watchdog whenever device is written to. */
+static ssize_t gemini_wdt_write(struct file *file, const char *data,
+ size_t len, loff_t *ppos)
+{
+ struct gemini_wdt_struct *gemini_wdt = file->private_data;
+
+ if (len) {
+ if (!nowayout) {
+ size_t i;
+
+ clear_bit(WDT_OK_TO_CLOSE, &gemini_wdt->status);
+ for (i = 0; i != len; i++) {
+ char c;
+
+ if (get_user(c, data + i))
+ return -EFAULT;
+ if (c == 'V')
+ set_bit(WDT_OK_TO_CLOSE,
+ &gemini_wdt->status);
+ }
+ }
+ gemini_wdt_service(gemini_wdt);
+ }
+
+ return len;
+}
+
+static const struct file_operations gemini_wdt_fops = {
+ .owner = THIS_MODULE,
+ .llseek = no_llseek,
+ .unlocked_ioctl = gemini_wdt_ioctl,
+ .open = gemini_wdt_open,
+ .release = gemini_wdt_close,
+ .write = gemini_wdt_write,
+};
+
+static struct miscdevice gemini_wdt_miscdev = {
+ .minor = WATCHDOG_MINOR,
+ .name = "watchdog",
+ .fops = &gemini_wdt_fops,
+};
+
+static void gemini_wdt_shutdown(struct platform_device *pdev)
+{
+ struct gemini_wdt_struct *gemini_wdt = platform_get_drvdata(pdev);
+
+ gemini_wdt_stop(gemini_wdt);
+}
+
+static int __devinit gemini_wdt_probe(struct platform_device *pdev)
+{
+ int ret;
+ int res_size;
+ struct resource *res;
+ void __iomem *base;
+ struct gemini_wdt_struct *gemini_wdt;
+ unsigned int reg;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ dev_err(&pdev->dev, "can't get device resources\n");
+ return -ENODEV;
+ }
+
+ res_size = resource_size(res);
+ if (!request_mem_region(res->start, res_size, res->name)) {
+ dev_err(&pdev->dev, "can't allocate %d bytes at %d address\n",
+ res_size, res->start);
+ return -ENOMEM;
+ }
+
+ base = ioremap(res->start, res_size);
+ if (!base) {
+ dev_err(&pdev->dev, "ioremap failed\n");
+ ret = -EIO;
+ goto fail0;
+ }
+
+ gemini_wdt = kzalloc(sizeof(struct gemini_wdt_struct), GFP_KERNEL);
+ if (!gemini_wdt) {
+ dev_err(&pdev->dev, "can't allocate interface\n");
+ ret = -ENOMEM;
+ goto fail1;
+ }
+
+ /* Setup gemini_wdt driver structure */
+ gemini_wdt->base = base;
+ gemini_wdt->res = res;
+
+ /* Set up platform driver data */
+ platform_set_drvdata(pdev, gemini_wdt);
+ gemini_wdt_dev = pdev;
+
+ if (gemini_wdt_miscdev.parent) {
+ ret = -EBUSY;
+ goto fail2;
+ }
+
+ gemini_wdt_miscdev.parent = &pdev->dev;
+
+ reg = __raw_readw(gemini_wdt->base + GEMINI_WDCR);
+ if (reg & WDCR_ENABLE) {
+ /* Watchdog was enabled by the bootloader, disable it. */
+ reg &= ~(WDCR_ENABLE);
+ __raw_writel(reg, gemini_wdt->base + GEMINI_WDCR);
+ }
+
+ ret = misc_register(&gemini_wdt_miscdev);
+ if (ret)
+ goto fail2;
+
+ return 0;
+
+fail2:
+ platform_set_drvdata(pdev, NULL);
+ kfree(gemini_wdt);
+fail1:
+ iounmap(base);
+fail0:
+ release_mem_region(res->start, res_size);
+
+ return ret;
+}
+
+static int __devexit gemini_wdt_remove(struct platform_device *pdev)
+{
+ struct gemini_wdt_struct *gemini_wdt = platform_get_drvdata(pdev);
+
+ platform_set_drvdata(pdev, NULL);
+ misc_deregister(&gemini_wdt_miscdev);
+ gemini_wdt_dev = NULL;
+ iounmap(gemini_wdt->base);
+ release_mem_region(gemini_wdt->res->start, resource_size(gemini_wdt->res));
+
+ kfree(gemini_wdt);
+
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static int gemini_wdt_suspend(struct platform_device *pdev, pm_message_t message)
+{
+ struct gemini_wdt_struct *gemini_wdt = platform_get_drvdata(pdev);
+ unsigned int reg;
+
+ reg = __raw_readw(gemini_wdt->base + GEMINI_WDCR);
+ reg &= ~(WDCR_WDENABLE);
+ __raw_writel(reg, gemini_wdt->base + GEMINI_WDCR);
+
+ return 0;
+}
+
+static int gemini_wdt_resume(struct platform_device *pdev)
+{
+ struct gemini_wdt_struct *gemini_wdt = platform_get_drvdata(pdev);
+ unsigned int reg;
+
+ if (gemini_wdt->status) {
+ reg = __raw_readw(gemini_wdt->base + GEMINI_WDCR);
+ reg |= WDCR_WDENABLE;
+ __raw_writel(reg, gemini_wdt->base + GEMINI_WDCR);
+ }
+
+ return 0;
+}
+#else
+#define gemini_wdt_suspend NULL
+#define gemini_wdt_resume NULL
+#endif
+
+static struct platform_driver gemini_wdt_driver = {
+ .probe = gemini_wdt_probe,
+ .remove = __devexit_p(gemini_wdt_remove),
+ .shutdown = gemini_wdt_shutdown,
+ .suspend = gemini_wdt_suspend,
+ .resume = gemini_wdt_resume,
+ .driver = {
+ .name = "gemini-wdt",
+ .owner = THIS_MODULE,
+ },
+};
+
+static int __init gemini_wdt_init(void)
+{
+ return platform_driver_probe(&gemini_wdt_driver, gemini_wdt_probe);
+}
+
+static void __exit gemini_wdt_exit(void)
+{
+ platform_driver_unregister(&gemini_wdt_driver);
+}
+
+module_init(gemini_wdt_init);
+module_exit(gemini_wdt_exit);
+
+module_param(timeout, uint, 0);
+MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds");
+
+module_param(nowayout, int, 0);
+MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started");
+
+MODULE_AUTHOR("Paulius Zaleckas");
+MODULE_DESCRIPTION("Watchdog driver for Gemini");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
+MODULE_ALIAS("platform:gemini-wdt");
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -127,6 +127,16 @@ config 977_WATCHDOG
Not sure? It's safe to say N.
+config GEMINI_WATCHDOG
+ tristate "Gemini watchdog"
+ depends on ARCH_GEMINI
+ help
+ Say Y here if to include support for the watchdog timer
+ embedded in the Cortina Systems Gemini family of devices.
+
+ To compile this driver as a module, choose M here: the
+ module will be called gemini_wdt.
+
config IXP2000_WATCHDOG
tristate "IXP2000 Watchdog"
depends on ARCH_IXP2000
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -36,6 +36,7 @@ obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.
obj-$(CONFIG_TWL4030_WATCHDOG) += twl4030_wdt.o
obj-$(CONFIG_21285_WATCHDOG) += wdt285.o
obj-$(CONFIG_977_WATCHDOG) += wdt977.o
+obj-$(CONFIG_GEMINI_WATCHDOG) += gemini_wdt.o
obj-$(CONFIG_IXP2000_WATCHDOG) += ixp2000_wdt.o
obj-$(CONFIG_IXP4XX_WATCHDOG) += ixp4xx_wdt.o
obj-$(CONFIG_KS8695_WATCHDOG) += ks8695_wdt.o

32
target/linux/gemini/patches-3.3/111-arm-gemini-add-watchdog-device.patch Normal file
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@ -0,0 +1,32 @@
--- a/arch/arm/mach-gemini/devices.c
+++ b/arch/arm/mach-gemini/devices.c
@@ -117,3 +117,20 @@ int __init platform_register_rtc(void)
return platform_device_register(&gemini_rtc_device);
}
+static struct resource wdt_resource = {
+ .start = GEMINI_WAQTCHDOG_BASE,
+ .end = GEMINI_WAQTCHDOG_BASE + 0x18,
+ .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device wdt_device = {
+ .name = "gemini-wdt",
+ .id = 0,
+ .resource = &wdt_resource,
+ .num_resources = 1,
+};
+
+int __init platform_register_watchdog(void)
+{
+ return platform_device_register(&wdt_device);
+}
--- a/arch/arm/mach-gemini/common.h
+++ b/arch/arm/mach-gemini/common.h
@@ -25,5 +25,6 @@ extern int platform_register_uart(void);
extern int platform_register_pflash(unsigned int size,
struct mtd_partition *parts,
unsigned int nr_parts);
+extern int platform_register_watchdog(void);
#endif /* __GEMINI_COMMON_H__ */

40
target/linux/gemini/patches-3.3/112-arm-gemini-register-watchdog-devices.patch Normal file
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@ -0,0 +1,40 @@
--- a/arch/arm/mach-gemini/board-nas4220b.c
+++ b/arch/arm/mach-gemini/board-nas4220b.c
@@ -99,6 +99,7 @@ static void __init ib4220b_init(void)
platform_device_register(&ib4220b_led_device);
platform_device_register(&ib4220b_key_device);
platform_register_rtc();
+ platform_register_watchdog();
}
MACHINE_START(NAS4220B, "Raidsonic NAS IB-4220-B")
--- a/arch/arm/mach-gemini/board-wbd111.c
+++ b/arch/arm/mach-gemini/board-wbd111.c
@@ -126,6 +126,7 @@ static void __init wbd111_init(void)
platform_device_register(&wbd111_leds_device);
platform_device_register(&wbd111_keys_device);
platform_register_rtc();
+ platform_register_watchdog();
}
MACHINE_START(WBD111, "Wiliboard WBD-111")
--- a/arch/arm/mach-gemini/board-wbd222.c
+++ b/arch/arm/mach-gemini/board-wbd222.c
@@ -126,6 +126,7 @@ static void __init wbd222_init(void)
platform_device_register(&wbd222_leds_device);
platform_device_register(&wbd222_keys_device);
platform_register_rtc();
+ platform_register_watchdog();
}
MACHINE_START(WBD222, "Wiliboard WBD-222")
--- a/arch/arm/mach-gemini/board-rut1xx.c
+++ b/arch/arm/mach-gemini/board-rut1xx.c
@@ -83,6 +83,7 @@ static void __init rut1xx_init(void)
platform_device_register(&rut1xx_leds);
platform_device_register(&rut1xx_keys_device);
platform_register_rtc();
+ platform_register_watchdog();
}
MACHINE_START(RUT100, "Teltonika RUT100")

2901
target/linux/gemini/patches-3.3/120-net-add-gemini-gmac-driver.patch Normal file
View file

File diff suppressed because it is too large Load diff

81
target/linux/gemini/patches-3.3/121-arm-gemini-add-ethernet-device.patch Normal file
View file

@ -0,0 +1,81 @@
--- a/arch/arm/mach-gemini/common.h
+++ b/arch/arm/mach-gemini/common.h
@@ -13,6 +13,7 @@
#define __GEMINI_COMMON_H__
struct mtd_partition;
+struct gemini_gmac_platform_data;
extern void gemini_map_io(void);
extern void gemini_init_irq(void);
@@ -26,5 +27,6 @@ extern int platform_register_pflash(unsi
struct mtd_partition *parts,
unsigned int nr_parts);
extern int platform_register_watchdog(void);
+extern int platform_register_ethernet(struct gemini_gmac_platform_data *pdata);
#endif /* __GEMINI_COMMON_H__ */
--- a/arch/arm/mach-gemini/devices.c
+++ b/arch/arm/mach-gemini/devices.c
@@ -17,6 +17,7 @@
#include <mach/irqs.h>
#include <mach/hardware.h>
#include <mach/global_reg.h>
+#include <mach/gmac.h>
#include "common.h"
static struct plat_serial8250_port serial_platform_data[] = {
@@ -134,3 +135,53 @@ int __init platform_register_watchdog(vo
{
return platform_device_register(&wdt_device);
}
+
+static struct resource gmac_resources[] = {
+ {
+ .start = 0x60000000,
+ .end = 0x6000ffff,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = IRQ_GMAC0,
+ .end = IRQ_GMAC0,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = IRQ_GMAC1,
+ .end = IRQ_GMAC1,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static u64 gmac_dmamask = 0xffffffffUL;
+
+static struct platform_device ethernet_device = {
+ .name = "gemini-gmac",
+ .id = 0,
+ .dev = {
+ .dma_mask = &gmac_dmamask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ },
+ .num_resources = ARRAY_SIZE(gmac_resources),
+ .resource = gmac_resources,
+};
+
+int __init platform_register_ethernet(struct gemini_gmac_platform_data *pdata)
+{
+ unsigned int reg;
+
+ reg = __raw_readl(IO_ADDRESS(GEMINI_GLOBAL_BASE) + GLOBAL_MISC_CTRL);
+ reg &= ~(GMAC_GMII | GMAC_1_ENABLE);
+
+ if (pdata->bus_id[1])
+ reg |= GMAC_1_ENABLE;
+ else if (pdata->interface[0] == PHY_INTERFACE_MODE_GMII)
+ reg |= GMAC_GMII;
+
+ __raw_writel(reg, IO_ADDRESS(GEMINI_GLOBAL_BASE) + GLOBAL_MISC_CTRL);
+
+ ethernet_device.dev.platform_data = pdata;
+
+ return platform_device_register(&ethernet_device);
+}

41
target/linux/gemini/patches-3.3/122-arm-gemini-wbd111-register-ethernet.patch Normal file
View file

@ -0,0 +1,41 @@
--- a/arch/arm/mach-gemini/board-wbd111.c
+++ b/arch/arm/mach-gemini/board-wbd111.c
@@ -22,9 +22,29 @@
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
+#include <mach/gmac.h>
#include "common.h"
+static struct mdio_gpio_platform_data wbd111_mdio = {
+ .mdc = 22,
+ .mdio = 21,
+ .phy_mask = ~(1 << 1),
+};
+
+static struct platform_device wbd111_phy_device = {
+ .name = "mdio-gpio",
+ .id = 0,
+ .dev = {
+ .platform_data = &wbd111_mdio,
+ },
+};
+
+static struct gemini_gmac_platform_data gmac_data = {
+ .bus_id[0] = "0:01",
+ .interface[0] = PHY_INTERFACE_MODE_MII,
+};
+
static struct gpio_keys_button wbd111_keys[] = {
{
.code = KEY_SETUP,
@@ -127,6 +147,8 @@ static void __init wbd111_init(void)
platform_device_register(&wbd111_keys_device);
platform_register_rtc();
platform_register_watchdog();
+ platform_device_register(&wbd111_phy_device);
+ platform_register_ethernet(&gmac_data);
}
MACHINE_START(WBD111, "Wiliboard WBD-111")

43
target/linux/gemini/patches-3.3/123-arm-gemini-wbd222-register-eth.patch Normal file
View file

@ -0,0 +1,43 @@
--- a/arch/arm/mach-gemini/board-wbd222.c
+++ b/arch/arm/mach-gemini/board-wbd222.c
@@ -22,9 +22,31 @@
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
+#include <mach/gmac.h>
#include "common.h"
+static struct mdio_gpio_platform_data wbd222_mdio = {
+ .mdc = 22,
+ .mdio = 21,
+ .phy_mask = ~((1 << 1) | (1 << 3)),
+};
+
+static struct platform_device wbd222_phy_device = {
+ .name = "mdio-gpio",
+ .id = 0,
+ .dev = {
+ .platform_data = &wbd222_mdio,
+ },
+};
+
+static struct gemini_gmac_platform_data gmac_data = {
+ .bus_id[0] = "0:01",
+ .interface[0] = PHY_INTERFACE_MODE_MII,
+ .bus_id[1] = "0:03",
+ .interface[1] = PHY_INTERFACE_MODE_MII,
+};
+
static struct gpio_keys_button wbd222_keys[] = {
{
.code = KEY_SETUP,
@@ -127,6 +149,8 @@ static void __init wbd222_init(void)
platform_device_register(&wbd222_keys_device);
platform_register_rtc();
platform_register_watchdog();
+ platform_device_register(&wbd222_phy_device);
+ platform_register_ethernet(&gmac_data);
}
MACHINE_START(WBD222, "Wiliboard WBD-222")

47
target/linux/gemini/patches-3.3/124-arm-gemini-rut100-register-ethernet.patch Normal file
View file

@ -0,0 +1,47 @@
--- a/arch/arm/mach-gemini/board-rut1xx.c
+++ b/arch/arm/mach-gemini/board-rut1xx.c
@@ -14,13 +14,35 @@
#include <linux/leds.h>
#include <linux/input.h>
#include <linux/gpio_keys.h>
+#include <linux/mdio-gpio.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
+#include <mach/gmac.h>
+
#include "common.h"
+static struct mdio_gpio_platform_data rut1xx_mdio = {
+ .mdc = 22,
+ .mdio = 21,
+ .phy_mask = ~(1 << 1),
+};
+
+static struct platform_device rut1xx_phy_device = {
+ .name = "mdio-gpio",
+ .id = 0,
+ .dev = {
+ .platform_data = &rut1xx_mdio,
+ },
+};
+
+static struct gemini_gmac_platform_data gmac_data = {
+ .bus_id[0] = "0:01",
+ .interface[0] = PHY_INTERFACE_MODE_MII,
+};
+
static struct gpio_keys_button rut1xx_keys[] = {
{
.code = KEY_SETUP,
@@ -84,6 +106,8 @@ static void __init rut1xx_init(void)
platform_device_register(&rut1xx_keys_device);
platform_register_rtc();
platform_register_watchdog();
+ platform_device_register(&rut1xx_phy_device);
+ platform_register_ethernet(&gmac_data);
}
MACHINE_START(RUT100, "Teltonika RUT100")

615
target/linux/gemini/patches-3.3/130-usb-ehci-gemini-fot2gxx-support.patch Normal file
View file

@ -0,0 +1,615 @@
--- /dev/null
+++ b/drivers/usb/host/ehci-fotg2xx.c
@@ -0,0 +1,465 @@
+/*
+ * EHCI Host Controller driver
+ *
+ * Copyright (C) 2006 Sony Computer Entertainment Inc.
+ * Copyright 2006 Sony Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ */
+
+#include <linux/platform_device.h>
+#include <mach/hardware.h>
+
+#define otg_set(port, bits) writel(readl(hcd->regs + port) | bits, hcd->regs + port)
+
+#define otg_clear(port, bits) writel(readl(hcd->regs + port) & ~bits, hcd->regs + port)
+
+#define GLOBAL_ISR 0xC0
+#define GLOBAL_ICR 0xC4
+
+#define HCD_MISC 0x40
+
+#define OTGC_SCR 0x80
+#define OTGC_INT_EN 0x88
+
+#define GLOBAL_INT_POLARITY (1 << 3)
+#define GLOBAL_INT_MASK_HC (1 << 2)
+#define GLOBAL_INT_MASK_OTG (1 << 1)
+#define GLOBAL_INT_MASK_DEV (1 << 0)
+
+#define OTGC_SCR_ID (1 << 21)
+#define OTGC_SCR_CROLE (1 << 20)
+#define OTGC_SCR_VBUS_VLD (1 << 19)
+#define OTGC_SCR_A_SRP_RESP_TYPE (1 << 8)
+#define OTGC_SCR_A_SRP_DET_EN (1 << 7)
+#define OTGC_SCR_A_SET_B_HNP_EN (1 << 6)
+#define OTGC_SCR_A_BUS_DROP (1 << 5)
+#define OTGC_SCR_A_BUS_REQ (1 << 4)
+
+#define OTGC_INT_APLGRMV (1 << 12)
+#define OTGC_INT_BPLGRMV (1 << 11)
+#define OTGC_INT_OVC (1 << 10)
+#define OTGC_INT_IDCHG (1 << 9)
+#define OTGC_INT_RLCHG (1 << 8)
+#define OTGC_INT_AVBUSERR (1 << 5)
+#define OTGC_INT_ASRPDET (1 << 4)
+#define OTGC_INT_BSRPDN (1 << 0)
+
+#define OTGC_INT_A_TYPE (OTGC_INT_ASRPDET|OTGC_INT_AVBUSERR|OTGC_INT_OVC|OTGC_INT_RLCHG|OTGC_INT_IDCHG|OTGC_INT_APLGRMV)
+#define OTGC_INT_B_TYPE (OTGC_INT_AVBUSERR|OTGC_INT_OVC|OTGC_INT_RLCHG|OTGC_INT_IDCHG)
+
+static void fotg2xx_otgc_role_change(struct usb_hcd *hcd);
+
+static void fotg2xx_otgc_init(struct usb_hcd *hcd)
+{
+ struct ehci_hcd *ehci = hcd_to_ehci(hcd);
+ unsigned int reg;
+
+ reg = __raw_readl(hcd->regs + OTGC_SCR);
+ ehci_info(ehci, "role detected: %s, ",
+ (reg & OTGC_SCR_CROLE) ? "Peripheral" : "Host");
+
+ if (reg & OTGC_SCR_ID)
+ ehci_info(ehci, "B-Device (may be unsupported!)\n");
+ else
+ ehci_info(ehci, "A-Device\n");
+
+ /* Enable the SRP detect */
+ reg &= ~OTGC_SCR_A_SRP_RESP_TYPE;
+ __raw_writel(reg, hcd->regs + OTGC_SCR);
+
+ reg = __raw_readl(hcd->regs + OTGC_INT_EN);
+ /* clear INT B: bits AVBUSERR | OVC | RLCHG | IDCHG */
+ reg &= ~OTGC_INT_B_TYPE;
+ /* set INT A: bits ASRPDET | AVBUSERR | OVC | RLCHG | IDCHG | APLGRMV */
+ reg |= OTGC_INT_A_TYPE;
+ __raw_writel(reg, hcd->regs + OTGC_INT_EN);
+
+ reg = __raw_readl(hcd->regs + GLOBAL_ICR);
+ reg &= ~GLOBAL_INT_MASK_OTG;
+ __raw_writel(reg, hcd->regs + GLOBAL_ICR);
+
+ /* setup MISC register, fixes timing problems */
+ reg = __raw_readl(hcd->regs + HCD_MISC);
+ reg |= 0xD;
+ __raw_writel(reg, hcd->regs + HCD_MISC);
+
+ fotg2xx_otgc_role_change(hcd);
+}
+
+static void fotg2xx_otgh_close(struct usb_hcd *hcd)
+{
+ unsigned int reg;
+
+ /* <1>.Enable Interrupt Mask */
+ reg = __raw_readl(hcd->regs + GLOBAL_ICR);
+ reg |= GLOBAL_INT_MASK_HC;
+ __raw_writel(reg, hcd->regs + GLOBAL_ICR);
+
+ /* <2>.Clear the Interrupt status */
+ reg = __raw_readl(hcd->regs + 0x18);
+ reg &= 0x0000003F;
+ __raw_writel(reg, hcd->regs + 0x14);
+}
+
+static void fotg2xx_otgh_open(struct usb_hcd *hcd)
+{
+ unsigned int reg;
+
+ reg = __raw_readl(hcd->regs + OTGC_SCR);
+ reg &= ~OTGC_SCR_A_SRP_DET_EN;
+ __raw_writel(reg, hcd->regs + OTGC_SCR);
+
+ reg = __raw_readl(hcd->regs + GLOBAL_ICR);
+ reg &= ~GLOBAL_INT_MASK_HC;
+ __raw_writel(reg, hcd->regs + GLOBAL_ICR);
+}
+
+/* change to host role */
+static void fotg2xx_otgc_role_change(struct usb_hcd *hcd)
+{
+
+ /* clear A_SET_B_HNP_EN */
+ otg_clear(0x80, BIT(6));
+
+ /*** Enable VBUS driving */
+ if (readl(hcd->regs + 0x80) & BIT(19))
+ printk(KERN_INFO "VBUS already enabled\n");
+ else {
+ int cnt = 0;
+
+ /* clear A_BUS_DROP */
+ otg_clear(0x80, BIT(5));
+
+ /* set A_BUS_REQ */
+ otg_set(0x80, BIT(4));
+
+ /* set global bus reg to VBUS on */
+ writel(readl(IO_ADDRESS(0x40000000) + 0x30) | ((BIT(21)|BIT(22))),
+ IO_ADDRESS(0x40000000) + 0x30);
+
+ if (readl(hcd->regs + 0x80) & (1<<19)) {
+ printk(KERN_INFO "Waiting for VBus");
+ while (!(readl(hcd->regs + 0x80) & (1<<19)) && (cnt < 80)) {
+ printk(KERN_CONT ".");
+ cnt++;
+ }
+ printk(KERN_CONT "\n");
+ } else
+ printk(KERN_INFO "VBUS enabled.\n");
+
+ mdelay(1);
+ }
+ fotg2xx_otgh_open(hcd);
+}
+
+static int fotg2xx_ehci_hc_reset(struct usb_hcd *hcd)
+{
+ int result;
+ struct ehci_hcd *ehci = hcd_to_ehci(hcd);
+
+ ehci->caps = hcd->regs;
+ ehci->regs = hcd->regs + HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
+
+ dbg_hcs_params(ehci, "reset");
+ dbg_hcc_params(ehci, "reset");
+
+ ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
+ hcd->has_tt = 1;
+
+ result = ehci_halt(ehci);
+ if (result)
+ return result;
+
+ result = ehci_init(hcd);
+ if (result)
+ return result;
+
+ ehci_port_power(ehci, 0);
+
+ return result;
+}
+
+/*
+ * Name: OTGC_INT_ISR
+ * Description:This interrupt service routine belongs to the OTG-Controller
+ * <1>.Check for ID_Change
+ * <2>.Check for RL_Change
+ * <3>.Error Detect
+ * Input: wINTStatus
+ * Output:void
+ */
+void fotg2xx_int_isr(struct usb_hcd *hcd, u32 wINTStatus)
+{
+ /* <1>.Check for ID_Change */
+ if (wINTStatus&OTGC_INT_IDCHG) {
+ if ((readl(hcd->regs + 0x80) & BIT(21)) != 0)
+ fotg2xx_otgc_init(hcd); /* Change to B Type */
+ else
+ fotg2xx_otgc_init(hcd); /* Change to A Type */
+
+ return;
+ }
+
+ /* <2>.Check for RL_Change */
+ if (wINTStatus&OTGC_INT_RLCHG)
+ fotg2xx_otgc_role_change(hcd);
+
+ /* <3>.Error Detect */
+ if (wINTStatus&OTGC_INT_AVBUSERR)
+ printk(KERN_ERR "VBus error!\n");
+
+ if (wINTStatus&OTGC_INT_OVC)
+ printk(KERN_WARNING "Overcurrent detected!\n");
+
+ /* <3>.Check for Type-A/Type-B Interrupt */
+ if ((readl(hcd->regs + 0x80) & BIT(21)) == 0) { /*For Type-A Interrupt*/
+ if (wINTStatus & (OTGC_INT_A_TYPE | OTGC_INT_ASRPDET)) {
+ /* <1>.SRP detected => then set global variable */
+ printk(KERN_WARNING "SRP detected, but not implemented!\n");
+
+#if 0
+ u32 wTempCounter;
+ /* <2>.Turn on the V Bus */
+ pFTC_OTG->otg.state = OTG_STATE_A_WAIT_VRISE;
+ OTGC_enable_vbus_draw_storlink(1);
+ pFTC_OTG->otg.state = OTG_STATE_A_HOST;
+ /* <3>.Should waiting for Device-Connect Wait 300ms */
+ INFO(pFTC_OTG, ">>> OTG-A Waiting for OTG-B Connect,\n");
+ wTempCounter = 0;
+ while (mwHost20_PORTSC_ConnectStatus_Rd() == 0) {
+ mdelay(1);
+ wTempCounter++;
+ /* Waiting for 300 ms */
+ if (wTempCounter > 300) {
+ mdwOTGC_Control_A_SRP_DET_EN_Clr();
+ INFO(pFTC_OTG, ">>> OTG-B do not connect under 300 ms...\n");
+ break;
+ }
+ }
+ /* <4>.If Connect => issue quick Reset */
+ if (mwHost20_PORTSC_ConnectStatus_Rd() > 0) {
+ mdelay(300); /* For OPT-A Test */
+ OTGH_host_quick_Reset();
+ OTGH_Open();
+ pFTC_OTG->otg.host->A_Disable_Set_Feature_HNP = 0;
+ }
+#endif
+ }
+ } else { /* For Type-B Interrupt */
+ BUG();
+ }
+}
+
+static irqreturn_t fotg2xx_ehci_irq(int irq, void *devid)
+{
+ struct usb_hcd *hcd = devid;
+ u32 val;
+
+ /* OTG Interrupt Status Register */
+ val = readl(hcd->regs + 0x84);
+
+ /* OTG stuff */
+ if (val) {
+ /* supposed to do "INT STS Clr" - XXX */
+ writel(readl(hcd->regs + 0x84) | val, hcd->regs + 0x84);
+
+ fotg2xx_int_isr(hcd, val);
+
+ /* supposed to do "INT STS Clr" - XXX */
+ writel(readl(hcd->regs + 0x84) | val, hcd->regs + 0x84);
+
+ return IRQ_HANDLED;
+ }
+
+ if ((readl(hcd->regs + 0x80) & BIT(20)) == 0) { /* Role is HOST */
+ if (readl(hcd->regs + 0xC0) & BIT(2)) { /* INT STS HOST */
+ /* leave this for ehci irq handler */
+ return IRQ_NONE;
+ }
+ } else
+ printk(KERN_WARNING
+ "received irq for peripheral - don't know what to do!\n");
+
+ /* do not call the ehci irq handler */
+ return IRQ_HANDLED;
+}
+
+static int fotg2xx_ehci_run(struct usb_hcd *hcd)
+{
+ int retval;
+
+ retval = ehci_run(hcd);
+
+ fotg2xx_otgh_close(hcd);
+ fotg2xx_otgc_init(hcd);
+
+ return retval;
+}
+
+static const struct hc_driver fotg2xx_ehci_hc_driver = {
+ .description = hcd_name,
+ .product_desc = "FOTG2XX EHCI Host Controller",
+ .hcd_priv_size = sizeof(struct ehci_hcd),
+ .irq = ehci_irq,
+ .flags = HCD_MEMORY | HCD_USB2,
+ .reset = fotg2xx_ehci_hc_reset,
+ .start = fotg2xx_ehci_run,
+ .stop = ehci_stop,
+ .shutdown = ehci_shutdown,
+
+ .urb_enqueue = ehci_urb_enqueue,
+ .urb_dequeue = ehci_urb_dequeue,
+ .endpoint_disable = ehci_endpoint_disable,
+ .endpoint_reset = ehci_endpoint_reset,
+
+ .get_frame_number = ehci_get_frame,
+
+ .hub_status_data = ehci_hub_status_data,
+ .hub_control = ehci_hub_control,
+#if defined(CONFIG_PM)
+ .bus_suspend = ehci_bus_suspend,
+ .bus_resume = ehci_bus_resume,
+#endif
+ .relinquish_port = ehci_relinquish_port,
+ .port_handed_over = ehci_port_handed_over,
+
+ .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
+};
+
+static int fotg2xx_ehci_probe(struct platform_device *pdev)
+{
+ const struct hc_driver *driver = &fotg2xx_ehci_hc_driver;
+ struct usb_hcd *hcd;
+ struct resource *res;
+ int irq;
+ int retval;
+
+ pr_debug("initializing FOTG2XX-SOC USB Controller\n");
+
+ res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+ if (!res) {
+ dev_err(&pdev->dev,
+ "Found HC with no IRQ. Check %s setup!\n",
+ dev_name(&pdev->dev));
+ return -ENODEV;
+ }
+
+ irq = res->start;
+
+ hcd = usb_create_hcd(driver, &pdev->dev, dev_name(&pdev->dev));
+ if (!hcd) {
+ retval = -ENOMEM;
+ goto err1;
+ }
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ dev_err(&pdev->dev,
+ "Found HC with no register addr. Check %s setup!\n",
+ dev_name(&pdev->dev));
+ retval = -ENODEV;
+ goto err2;
+ }
+
+ hcd->rsrc_start = res->start;
+ hcd->rsrc_len = res->end - res->start + 1;
+ if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len,
+ driver->description)) {
+ dev_dbg(&pdev->dev, "controller already in use\n");
+ retval = -EBUSY;
+ goto err2;
+ }
+
+ hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
+ if (hcd->regs == NULL) {
+ dev_dbg(&pdev->dev, "error mapping memory\n");
+ retval = -EFAULT;
+ goto err3;
+ }
+
+
+ /* set global reg to mini-A host */
+ writel(readl(IO_ADDRESS(0x40000000) + 0x30) & ~(BIT(30)|BIT(29)),
+ IO_ADDRESS(0x40000000) + 0x30);
+
+ /* USB0&USB1 - VBUS off */
+ writel(readl(IO_ADDRESS(0x40000000) + 0x30) & ~(BIT(21)|BIT(22)),
+ IO_ADDRESS(0x40000000) + 0x30);
+
+ if ((readl(hcd->regs) == 0x01000010) &&
+ (readl(hcd->regs + 4) == 0x00000001) &&
+ (readl(hcd->regs + 8) == 0x00000006)) {
+ dev_info(&pdev->dev,
+ "Found Faraday OTG 2XX controller (base = 0x%08lX)\n",
+ (unsigned long) hcd->rsrc_start);
+ } else {
+ dev_err(&pdev->dev, "fotg2xx id mismatch: found %d.%d.%d\n",
+ readl(hcd->regs + 0x00),
+ readl(hcd->regs + 0x04),
+ readl(hcd->regs + 0x08));
+ retval = -ENODEV;
+ goto err4;
+ }
+
+ platform_set_drvdata(pdev, hcd);
+
+ /* mask interrupts - peripheral, otg, host, hi-active (bits 0,1,2,3) */
+ otg_set(0xc4, BIT(3)); /* hi active */
+
+ otg_set(0xc4, BIT(2)); /* host */
+ otg_set(0xc4, BIT(1)); /* otg */
+ otg_set(0xc4, BIT(0)); /* peripheral */
+
+ /* register additional interrupt - here we check otg status */
+ if ((request_irq(irq, &fotg2xx_ehci_irq, IRQF_SHARED | IRQF_DISABLED,
+ hcd->irq_descr, hcd)) != 0) {
+ dev_dbg(&pdev->dev, "error requesting irq %d\n", irq);
+ retval = -EFAULT;
+ goto err4;
+ }
+
+ retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
+ if (retval != 0)
+ goto err4;
+ return retval;
+
+err4:
+ iounmap(hcd->regs);
+err3:
+ release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
+err2:
+ usb_put_hcd(hcd);
+err1:
+ dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), retval);
+ return retval;
+}
+
+/* may be called without controller electrically present */
+/* may be called with controller, bus, and devices active */
+
+int fotg2xx_ehci_remove(struct platform_device *pdev)
+{
+ struct usb_hcd *hcd =
+ (struct usb_hcd *)platform_get_drvdata(pdev);
+
+ usb_remove_hcd(hcd);
+ release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
+ iounmap(hcd->regs);
+ usb_put_hcd(hcd);
+ platform_set_drvdata(pdev, NULL);
+
+ return 0;
+}
+
+MODULE_ALIAS("platform:ehci-fotg2xx");
+
+static struct platform_driver fotg2xx_ehci_driver = {
+ .probe = fotg2xx_ehci_probe,
+ .remove = fotg2xx_ehci_remove,
+ .driver = {
+ .name = "ehci-fotg2xx",
+ },
+};
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -581,7 +581,12 @@ static inline unsigned int
ehci_port_speed(struct ehci_hcd *ehci, unsigned int portsc)
{
if (ehci_is_TDI(ehci)) {
+#ifdef CONFIG_ARCH_GEMINI
+ portsc = readl(ehci_to_hcd(ehci)->regs + 0x80);
+ switch ((portsc>>22)&3) {
+#else
switch ((portsc >> (ehci->has_hostpc ? 25 : 26)) & 3) {
+#endif
case 0:
return 0;
case 1:
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -227,9 +227,11 @@ static int ehci_halt (struct ehci_hcd *e
if ((temp & STS_HALT) != 0)
return 0;
+#ifndef CONFIG_ARCH_GEMINI
temp = ehci_readl(ehci, &ehci->regs->command);
temp &= ~CMD_RUN;
ehci_writel(ehci, temp, &ehci->regs->command);
+#endif
return handshake (ehci, &ehci->regs->status,
STS_HALT, STS_HALT, 16 * 125);
}
@@ -342,8 +344,10 @@ static int ehci_reset (struct ehci_hcd *
if (retval)
return retval;
+#ifndef CONFIG_ARCH_GEMINI
if (ehci_is_TDI(ehci))
tdi_reset (ehci);
+#endif
if (ehci->debug)
dbgp_external_startup();
@@ -478,12 +482,13 @@ static void ehci_silence_controller(stru
{
ehci_halt(ehci);
ehci_turn_off_all_ports(ehci);
-
+#ifndef CONFIG_ARCH_GEMINI
/* make BIOS/etc use companion controller during reboot */
ehci_writel(ehci, 0, &ehci->regs->configured_flag);
/* unblock posted writes */
ehci_readl(ehci, &ehci->regs->configured_flag);
+#endif
}
/* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
@@ -764,7 +769,9 @@ static int ehci_run (struct usb_hcd *hcd
// Philips, Intel, and maybe others need CMD_RUN before the
// root hub will detect new devices (why?); NEC doesn't
ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
+#ifndef CONFIG_ARCH_GEMINI
ehci->command |= CMD_RUN;
+#endif
ehci_writel(ehci, ehci->command, &ehci->regs->command);
dbg_cmd (ehci, "init", ehci->command);
@@ -784,9 +791,11 @@ static int ehci_run (struct usb_hcd *hcd
*/
down_write(&ehci_cf_port_reset_rwsem);
ehci->rh_state = EHCI_RH_RUNNING;
+#ifndef CONFIG_ARCH_GEMINI
ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
msleep(5);
+#endif /* !CONFIG_ARCH_GEMINI */
up_write(&ehci_cf_port_reset_rwsem);
ehci->last_periodic_enable = ktime_get_real();
@@ -958,7 +967,9 @@ static irqreturn_t ehci_irq (struct usb_
ehci_halt(ehci);
dead:
ehci_reset(ehci);
+#ifndef CONFIG_ARCH_GEMINI
ehci_writel(ehci, 0, &ehci->regs->configured_flag);
+#endif
usb_hc_died(hcd);
/* generic layer kills/unlinks all urbs, then
* uses ehci_stop to clean up the rest
@@ -1256,6 +1267,11 @@ MODULE_LICENSE ("GPL");
#define PCI_DRIVER ehci_pci_driver
#endif
+#ifdef CONFIG_ARCH_GEMINI
+#include "ehci-fotg2xx.c"
+#define PLATFORM_DRIVER fotg2xx_ehci_driver
+#endif
+
#ifdef CONFIG_USB_EHCI_FSL
#include "ehci-fsl.c"
#define PLATFORM_DRIVER ehci_fsl_driver
--- a/drivers/usb/host/ehci-hub.c
+++ b/drivers/usb/host/ehci-hub.c
@@ -882,6 +882,12 @@ static int ehci_hub_control (
/* see what we found out */
temp = check_reset_complete (ehci, wIndex, status_reg,
ehci_readl(ehci, status_reg));
+#ifdef CONFIG_ARCH_GEMINI
+ /* restart schedule */
+ ehci_writel(ehci, ehci_readl(ehci, &ehci->regs->command) | CMD_RUN, &ehci->regs->command);
+
+// hcd->state = HC_STATE_RUNNING;
+#endif
}
if (!(temp & (PORT_RESUME|PORT_RESET)))
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -76,6 +76,7 @@ config USB_ARCH_HAS_EHCI
default y if MICROBLAZE
default y if SPARC_LEON
default y if ARCH_MMP
+ default y if ARCH_GEMINI
default PCI
# some non-PCI HCDs implement xHCI
@@ -94,7 +95,7 @@ config USB
traditional PC serial port. The bus supplies power to peripherals
and allows for hot swapping. Up to 127 USB peripherals can be
connected to a single USB host in a tree structure.
-
+
The USB host is the root of the tree, the peripherals are the
leaves and the inner nodes are special USB devices called hubs.
Most PCs now have USB host ports, used to connect peripherals
--- a/include/linux/usb/ehci_def.h
+++ b/include/linux/usb/ehci_def.h
@@ -110,9 +110,9 @@ struct ehci_regs {
u32 frame_list; /* points to periodic list */
/* ASYNCLISTADDR: offset 0x18 */
u32 async_next; /* address of next async queue head */
-
+#ifndef CONFIG_ARCH_GEMINI
u32 reserved[9];
-
+#endif
/* CONFIGFLAG: offset 0x40 */
u32 configured_flag;
#define FLAG_CF (1<<0) /* true: we'll support "high speed" */

74
target/linux/gemini/patches-3.3/131-arm-gemini-add-usb-platform-device.patch Normal file
View file

@ -0,0 +1,74 @@
--- a/arch/arm/mach-gemini/devices.c
+++ b/arch/arm/mach-gemini/devices.c
@@ -185,3 +185,62 @@ int __init platform_register_ethernet(st
return platform_device_register(&ethernet_device);
}
+
+static u64 usb0_dmamask = DMA_BIT_MASK(32);
+static struct resource usb0_resources[] = {
+ {
+ .start = 0x68000000,
+ .end = 0x68000fff,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = IRQ_USB0,
+ .end = IRQ_USB0,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static u64 usb1_dmamask = DMA_BIT_MASK(32);
+static struct resource usb1_resources[] = {
+ {
+ .start = 0x69000000,
+ .end = 0x69000fff,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = IRQ_USB1,
+ .end = IRQ_USB1,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device usb_device[] = {
+ {
+ .name = "ehci-fotg2xx",
+ .id = 0,
+ .dev = {
+ .dma_mask = &usb0_dmamask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ },
+ .num_resources = ARRAY_SIZE(usb0_resources),
+ .resource = usb0_resources,
+ },
+ {
+ .name = "ehci-fotg2xx",
+ .id = 1,
+ .dev = {
+ .dma_mask = &usb1_dmamask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ },
+ .num_resources = ARRAY_SIZE(usb1_resources),
+ .resource = usb1_resources,
+ },
+};
+
+int __init platform_register_usb(unsigned int id)
+{
+ if (id > 1)
+ return -EINVAL;
+
+ return platform_device_register(&usb_device[id]);
+}
--- a/arch/arm/mach-gemini/common.h
+++ b/arch/arm/mach-gemini/common.h
@@ -28,5 +28,6 @@ extern int platform_register_pflash(unsi
unsigned int nr_parts);
extern int platform_register_watchdog(void);
extern int platform_register_ethernet(struct gemini_gmac_platform_data *pdata);
+extern int platform_register_usb(unsigned int id);
#endif /* __GEMINI_COMMON_H__ */

24
target/linux/gemini/patches-3.3/132-arm-gemini-wbd111-register-usb.patch Normal file
View file

@ -0,0 +1,24 @@
--- a/arch/arm/mach-gemini/board-wbd111.c
+++ b/arch/arm/mach-gemini/board-wbd111.c
@@ -149,6 +149,7 @@ static void __init wbd111_init(void)
platform_register_watchdog();
platform_device_register(&wbd111_phy_device);
platform_register_ethernet(&gmac_data);
+ platform_register_usb(0);
}
MACHINE_START(WBD111, "Wiliboard WBD-111")
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -112,7 +112,11 @@ module_param (park, uint, S_IRUGO);
MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
/* for flakey hardware, ignore overcurrent indicators */
+#ifdef CONFIG_ARCH_GEMINI
+static bool ignore_oc = 1;
+#else
static bool ignore_oc = 0;
+#endif
module_param (ignore_oc, bool, S_IRUGO);
MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");

10
target/linux/gemini/patches-3.3/133-arm-gemini-wbd222-register-usb.patch Normal file
View file

@ -0,0 +1,10 @@
--- a/arch/arm/mach-gemini/board-wbd222.c
+++ b/arch/arm/mach-gemini/board-wbd222.c
@@ -151,6 +151,7 @@ static void __init wbd222_init(void)
platform_register_watchdog();
platform_device_register(&wbd222_phy_device);
platform_register_ethernet(&gmac_data);
+ platform_register_usb(0);
}
MACHINE_START(WBD222, "Wiliboard WBD-222")

10
target/linux/gemini/patches-3.3/134-arm-gemini-rut100-register-usb.patch Normal file
View file

@ -0,0 +1,10 @@
--- a/arch/arm/mach-gemini/board-rut1xx.c
+++ b/arch/arm/mach-gemini/board-rut1xx.c
@@ -108,6 +108,7 @@ static void __init rut1xx_init(void)
platform_register_watchdog();
platform_device_register(&rut1xx_phy_device);
platform_register_ethernet(&gmac_data);
+ platform_register_usb(0);
}
MACHINE_START(RUT100, "Teltonika RUT100")

11
target/linux/gemini/patches-3.3/135-arm-gemini-nas4220-register-usb.patch Normal file
View file

@ -0,0 +1,11 @@
--- a/arch/arm/mach-gemini/board-nas4220b.c
+++ b/arch/arm/mach-gemini/board-nas4220b.c
@@ -100,6 +100,8 @@ static void __init ib4220b_init(void)
platform_device_register(&ib4220b_key_device);
platform_register_rtc();
platform_register_watchdog();
+ platform_register_usb(0);
+ platform_register_usb(1);
}
MACHINE_START(NAS4220B, "Raidsonic NAS IB-4220-B")

390
target/linux/gemini/patches-3.3/140-arm-gemini-add-pci-support.patch Normal file
View file

@ -0,0 +1,390 @@
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -379,6 +379,7 @@ config ARCH_GEMINI
select CPU_FA526
select ARCH_REQUIRE_GPIOLIB
select ARCH_USES_GETTIMEOFFSET
+ select MIGHT_HAVE_PCI
help
Support for the Cortina Systems Gemini family SoCs
--- a/arch/arm/mach-gemini/include/mach/hardware.h
+++ b/arch/arm/mach-gemini/include/mach/hardware.h
@@ -71,4 +71,9 @@
*/
#define IO_ADDRESS(x) ((((x) & 0xFFF00000) >> 4) | ((x) & 0x000FFFFF) | 0xF0000000)
+/*
+ * PCI subsystem macros
+ */
+#define pcibios_assign_all_busses() 1
+
#endif
--- a/arch/arm/mach-gemini/include/mach/irqs.h
+++ b/arch/arm/mach-gemini/include/mach/irqs.h
@@ -43,11 +43,14 @@
#define NORMAL_IRQ_NUM 32
-#define GPIO_IRQ_BASE NORMAL_IRQ_NUM
+#define PCI_IRQ_BASE NORMAL_IRQ_NUM
+#define PCI_IRQ_NUM 4
+
+#define GPIO_IRQ_BASE (NORMAL_IRQ_NUM + PCI_IRQ_NUM)
#define GPIO_IRQ_NUM (3 * 32)
#define ARCH_TIMER_IRQ IRQ_TIMER2
-#define NR_IRQS (NORMAL_IRQ_NUM + GPIO_IRQ_NUM)
+#define NR_IRQS (NORMAL_IRQ_NUM + PCI_IRQ_NUM + GPIO_IRQ_NUM)
#endif /* __MACH_IRQS_H__ */
--- a/arch/arm/mach-gemini/Makefile
+++ b/arch/arm/mach-gemini/Makefile
@@ -6,6 +6,8 @@
obj-y := irq.o mm.o time.o devices.o gpio.o
+obj-$(CONFIG_PCI) += pci.o
+
# Board-specific support
obj-$(CONFIG_MACH_NAS4220B) += board-nas4220b.o
obj-$(CONFIG_MACH_RUT100) += board-rut1xx.o
--- a/arch/arm/mach-gemini/mm.c
+++ b/arch/arm/mach-gemini/mm.c
@@ -59,6 +59,11 @@ static struct map_desc gemini_io_desc[]
.length = SZ_512K,
.type = MT_DEVICE,
}, {
+ .virtual = IO_ADDRESS(GEMINI_PCI_IO_BASE),
+ .pfn = __phys_to_pfn(GEMINI_PCI_IO_BASE),
+ .length = SZ_512K,
+ .type = MT_DEVICE,
+ }, {
.virtual = IO_ADDRESS(GEMINI_FLASH_CTRL_BASE),
.pfn = __phys_to_pfn(GEMINI_FLASH_CTRL_BASE),
.length = SZ_512K,
--- /dev/null
+++ b/arch/arm/mach-gemini/pci.c
@@ -0,0 +1,321 @@
+/*
+ * Support for Gemini PCI Controller
+ *
+ * Copyright (C) 2009 Janos Laube <janos.dev@gmail.com>
+ * Copyright (C) 2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
+ *
+ * based on SL2312 PCI controller code
+ * Storlink (C) 2003
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/irq.h>
+#include <linux/gpio.h>
+
+#include <asm/mach/pci.h>
+
+#include <mach/irqs.h>
+#include <mach/hardware.h>
+
+#define GEMINI_PCI_IOSIZE_1M 0x0000
+
+#define GEMINI_PCI_PMC 0x40
+#define GEMINI_PCI_PMCSR 0x44
+#define GEMINI_PCI_CTRL1 0x48
+#define GEMINI_PCI_CTRL2 0x4C
+#define GEMINI_PCI_MEM1_BASE_SIZE 0x50
+#define GEMINI_PCI_MEM2_BASE_SIZE 0x54
+#define GEMINI_PCI_MEM3_BASE_SIZE 0x58
+
+#define PCI_CTRL2_INTSTS_OFFSET 28
+#define PCI_CTRL2_INTMASK_OFFSET 22
+
+#define GEMINI_PCI_DMA_MASK 0xFFF00000
+#define GEMINI_PCI_DMA_MEM1_BASE 0x00000000
+#define GEMINI_PCI_DMA_MEM2_BASE 0x00000000
+#define GEMINI_PCI_DMA_MEM3_BASE 0x00000000
+#define GEMINI_PCI_DMA_MEM1_SIZE 7
+#define GEMINI_PCI_DMA_MEM2_SIZE 6
+#define GEMINI_PCI_DMA_MEM3_SIZE 6
+
+#define PCI_CONF_ENABLE (1 << 31)
+#define PCI_CONF_WHERE(r) ((r) & 0xFC)
+#define PCI_CONF_BUS(b) (((b) & 0xFF) << 16)
+#define PCI_CONF_DEVICE(d) (((d) & 0x1F) << 11)
+#define PCI_CONF_FUNCTION(f) (((f) & 0x07) << 8)
+
+#define PCI_IOSIZE_REG (IO_ADDRESS(GEMINI_PCI_IO_BASE))
+#define PCI_PROT_REG (IO_ADDRESS(GEMINI_PCI_IO_BASE) + 0x04)
+#define PCI_CTRL_REG (IO_ADDRESS(GEMINI_PCI_IO_BASE) + 0x08)
+#define PCI_SOFTRST_REG (IO_ADDRESS(GEMINI_PCI_IO_BASE) + 0x10)
+#define PCI_CONFIG_REG (IO_ADDRESS(GEMINI_PCI_IO_BASE) + 0x28)
+#define PCI_DATA_REG (IO_ADDRESS(GEMINI_PCI_IO_BASE) + 0x2C)
+
+
+static DEFINE_SPINLOCK(gemini_pci_lock);
+
+static int gemini_pci_read_config(struct pci_bus* bus, unsigned int fn,
+ int config, int size, u32* value)
+{
+ unsigned long irq_flags;
+
+ spin_lock_irqsave(&gemini_pci_lock, irq_flags);
+
+ __raw_writel(PCI_CONF_BUS(bus->number) |
+ PCI_CONF_DEVICE(PCI_SLOT(fn)) |
+ PCI_CONF_FUNCTION(PCI_FUNC(fn)) |
+ PCI_CONF_WHERE(config) |
+ PCI_CONF_ENABLE,
+ PCI_CONFIG_REG);
+
+ *value = __raw_readl(PCI_DATA_REG);
+
+ if (size == 1)
+ *value = (*value >> (8 * (config & 3))) & 0xFF;
+ else if (size == 2)
+ *value = (*value >> (8 * (config & 3))) & 0xFFFF;
+
+ spin_unlock_irqrestore(&gemini_pci_lock, irq_flags);
+
+ dev_dbg(&bus->dev,
+ "[read] slt: %.2d, fnc: %d, cnf: 0x%.2X, val (%d bytes): 0x%.8X\n",
+ PCI_SLOT(fn), PCI_FUNC(fn), config, size, *value);
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+static int gemini_pci_write_config(struct pci_bus* bus, unsigned int fn,
+ int config, int size, u32 value)
+{
+ unsigned long irq_flags = 0;
+ int ret = PCIBIOS_SUCCESSFUL;
+
+ dev_dbg(&bus->dev,
+ "[write] slt: %.2d, fnc: %d, cnf: 0x%.2X, val (%d bytes): 0x%.8X\n",
+ PCI_SLOT(fn), PCI_FUNC(fn), config, size, value);
+
+ spin_lock_irqsave(&gemini_pci_lock, irq_flags);
+
+ __raw_writel(PCI_CONF_BUS(bus->number) |
+ PCI_CONF_DEVICE(PCI_SLOT(fn)) |
+ PCI_CONF_FUNCTION(PCI_FUNC(fn)) |
+ PCI_CONF_WHERE(config) |
+ PCI_CONF_ENABLE,
+ PCI_CONFIG_REG);
+
+ switch(size) {
+ case 4:
+ __raw_writel(value, PCI_DATA_REG);
+ break;
+ case 2:
+ __raw_writew(value, PCI_DATA_REG + (config & 3));
+ break;
+ case 1:
+ __raw_writeb(value, PCI_DATA_REG + (config & 3));
+ break;
+ default:
+ ret = PCIBIOS_BAD_REGISTER_NUMBER;
+ }
+
+ spin_unlock_irqrestore(&gemini_pci_lock, irq_flags);
+
+ return ret;
+}
+
+static struct pci_ops gemini_pci_ops = {
+ .read = gemini_pci_read_config,
+ .write = gemini_pci_write_config,
+};
+
+static struct resource gemini_pci_resource_io = {
+ .name = "PCI I/O Space",
+ .start = IO_ADDRESS(GEMINI_PCI_IO_BASE),
+ .end = IO_ADDRESS(GEMINI_PCI_IO_BASE) + SZ_1M - 1,
+ .flags = IORESOURCE_IO,
+};
+
+static struct resource gemini_pci_resource_mem = {
+ .name = "PCI Memory Space",
+ .start = GEMINI_PCI_MEM_BASE,
+ .end = GEMINI_PCI_MEM_BASE + SZ_128M - 1,
+ .flags = IORESOURCE_MEM,
+};
+
+static int __init gemini_pci_request_resources(struct pci_sys_data *sys)
+{
+ if (request_resource(&ioport_resource, &gemini_pci_resource_io))
+ goto bad_resources;
+ if (request_resource(&iomem_resource, &gemini_pci_resource_mem))
+ goto bad_resources;
+
+ pci_add_resource(&sys->resources, &gemini_pci_resource_io);
+ pci_add_resource(&sys->resources, &gemini_pci_resource_mem);
+
+ return 0;
+
+bad_resources:
+ pr_err("Gemini PCI: request_resource() failed. "
+ "Abort PCI bus enumeration.\n");
+ return -1;
+}
+
+static int __init gemini_pci_setup(int nr, struct pci_sys_data *sys)
+{
+ unsigned int cmd;
+
+ pcibios_min_io = 0x100;
+ pcibios_min_mem = 0;
+
+ if ((nr > 0) || gemini_pci_request_resources(sys))
+ return 0;
+
+ /* setup I/O space to 1MB size */
+ __raw_writel(GEMINI_PCI_IOSIZE_1M, PCI_IOSIZE_REG);
+
+ /* setup hostbridge */
+ cmd = __raw_readl(PCI_CTRL_REG);
+ cmd |= PCI_COMMAND_IO;
+ cmd |= PCI_COMMAND_MEMORY;
+ cmd |= PCI_COMMAND_MASTER;
+ __raw_writel(cmd, PCI_CTRL_REG);
+
+ return 1;
+}
+
+static struct pci_bus* __init gemini_pci_scan_bus(int nr, struct pci_sys_data* sys)
+{
+ unsigned int reg = 0;
+ struct pci_bus* bus = 0;
+
+ bus = pci_scan_bus(nr, &gemini_pci_ops, sys);
+ if (bus) {
+ dev_dbg(&bus->dev, "setting up PCI DMA\n");
+ reg = (GEMINI_PCI_DMA_MEM1_BASE & GEMINI_PCI_DMA_MASK)
+ | (GEMINI_PCI_DMA_MEM1_SIZE << 16);
+ gemini_pci_write_config(bus, 0, GEMINI_PCI_MEM1_BASE_SIZE, 4, reg);
+ reg = (GEMINI_PCI_DMA_MEM2_BASE & GEMINI_PCI_DMA_MASK)
+ | (GEMINI_PCI_DMA_MEM2_SIZE << 16);
+ gemini_pci_write_config(bus, 0, GEMINI_PCI_MEM2_BASE_SIZE, 4, reg);
+ reg = (GEMINI_PCI_DMA_MEM3_BASE & GEMINI_PCI_DMA_MASK)
+ | (GEMINI_PCI_DMA_MEM3_SIZE << 16);
+ gemini_pci_write_config(bus, 0, GEMINI_PCI_MEM3_BASE_SIZE, 4, reg);
+ }
+
+ return bus;
+}
+
+/* Should work with all boards based on original Storlink EVB */
+static int __init gemini_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+{
+ if (slot < 9 || slot > 12)
+ return -1;
+
+ return PCI_IRQ_BASE + (((slot - 9) + (pin - 1)) & 0x3);
+}
+
+static struct hw_pci gemini_hw_pci __initdata = {
+ .nr_controllers = 1,
+ .setup = gemini_pci_setup,
+ .scan = gemini_pci_scan_bus,
+ .swizzle = pci_std_swizzle,
+ .map_irq = gemini_pci_map_irq,
+};
+
+/* we need this for muxed PCI interrupts handling */
+static struct pci_bus bogus_pci_bus;
+
+static void gemini_pci_ack_irq(struct irq_data *d)
+{
+ unsigned int irq = d->irq;
+ unsigned int reg;
+
+ gemini_pci_read_config(&bogus_pci_bus, 0, GEMINI_PCI_CTRL2, 4, &reg);
+ reg &= ~(0xF << PCI_CTRL2_INTSTS_OFFSET);
+ reg |= 1 << (irq - PCI_IRQ_BASE + PCI_CTRL2_INTSTS_OFFSET);
+ gemini_pci_write_config(&bogus_pci_bus, 0, GEMINI_PCI_CTRL2, 4, reg);
+}
+
+static void gemini_pci_mask_irq(struct irq_data *d)
+{
+ unsigned int irq = d->irq;
+ unsigned int reg;
+
+ gemini_pci_read_config(&bogus_pci_bus, 0, GEMINI_PCI_CTRL2, 4, &reg);
+ reg &= ~((0xF << PCI_CTRL2_INTSTS_OFFSET)
+ | (1 << (irq - PCI_IRQ_BASE + PCI_CTRL2_INTMASK_OFFSET)));
+ gemini_pci_write_config(&bogus_pci_bus, 0, GEMINI_PCI_CTRL2, 4, reg);
+}
+
+static void gemini_pci_unmask_irq(struct irq_data *d)
+{
+ unsigned int irq = d->irq;
+ unsigned int reg;
+
+ gemini_pci_read_config(&bogus_pci_bus, 0, GEMINI_PCI_CTRL2, 4, &reg);
+ reg &= ~(0xF << PCI_CTRL2_INTSTS_OFFSET);
+ reg |= 1 << (irq - PCI_IRQ_BASE + PCI_CTRL2_INTMASK_OFFSET);
+ gemini_pci_write_config(&bogus_pci_bus, 0, GEMINI_PCI_CTRL2, 4, reg);
+}
+
+static void gemini_pci_irq_handler(unsigned int irq, struct irq_desc *desc)
+{
+ unsigned int pci_irq_no, irq_stat, reg, i;
+
+ gemini_pci_read_config(&bogus_pci_bus, 0, GEMINI_PCI_CTRL2, 4, &reg);
+ irq_stat = reg >> PCI_CTRL2_INTSTS_OFFSET;
+
+ for (i = 0; i < 4; i++) {
+
+ if ((irq_stat & (1 << i)) == 0)
+ continue;
+
+ pci_irq_no = PCI_IRQ_BASE + i;
+
+ BUG_ON(!(irq_desc[pci_irq_no].handle_irq));
+ irq_desc[pci_irq_no].handle_irq(pci_irq_no,
+ &irq_desc[pci_irq_no]);
+ }
+}
+
+static struct irq_chip gemini_pci_irq_chip = {
+ .name = "PCI",
+ .irq_ack = gemini_pci_ack_irq,
+ .irq_mask = gemini_pci_mask_irq,
+ .irq_unmask = gemini_pci_unmask_irq,
+};
+
+static int __init gemini_pci_init(void)
+{
+ int i;
+
+ for (i = 72; i <= 95; i++)
+ gpio_request(i, "PCI");
+
+ /* initialize our bogus bus */
+ dev_set_name(&bogus_pci_bus.dev, "PCI IRQ handler");
+ bogus_pci_bus.number = 0;
+
+ /* mask and clear all interrupts */
+ gemini_pci_write_config(&bogus_pci_bus, 0, GEMINI_PCI_CTRL2 + 2, 2,
+ 0xF000);
+
+ for (i = PCI_IRQ_BASE; i < PCI_IRQ_BASE + 4; i++) {
+ irq_set_chip_and_handler(i, &gemini_pci_irq_chip,
+ handle_level_irq);
+ set_irq_flags(i, IRQF_VALID);
+ }
+
+ irq_set_chained_handler(IRQ_PCI, gemini_pci_irq_handler);
+
+ pci_common_init(&gemini_hw_pci);
+
+ return 0;
+}
+
+subsys_initcall(gemini_pci_init);