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back out change to generic-2.6/files/ and update 310-ssb_pcicore_fixes.patch for 2.6.23

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SVN-Revision: 9281
This commit is contained in:
Felix Fietkau 2007-10-13 02:21:24 +00:00
parent e29b73435a
commit ceb5350cd3
2 changed files with 13 additions and 14 deletions
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12
target/linux/generic-2.6/files/drivers/ssb/driver_pcicore.c
View file

@ -93,13 +93,10 @@ static void __init ssb_fixup_pcibridge(struct pci_dev *dev)
/* Enable PCI bridge BAR1 prefetch and burst */
pci_write_config_dword(dev, SSB_BAR1_CONTROL, 3);
/* Make sure our latency is high enough to handle the devices behind us */
pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xa8);
}
DECLARE_PCI_FIXUP_EARLY(PCI_ANY_ID, PCI_ANY_ID, ssb_fixup_pcibridge);
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
return ssb_mips_irq(extpci_core->dev) + 2;
}
@ -113,7 +110,7 @@ static u32 get_cfgspace_addr(struct ssb_pcicore *pc,
if (unlikely(pc->cardbusmode && dev > 1))
goto out;
if (bus == 0) {//FIXME busnumber ok?
if (bus == 0) {
/* Type 0 transaction */
if (unlikely(dev >= SSB_PCI_SLOT_MAX))
goto out;
@ -227,7 +224,7 @@ static int ssb_extpci_write_config(struct ssb_pcicore *pc,
val = *((const u32 *)buf);
break;
}
writel(val, mmio);
writel(*((const u32 *)buf), mmio);
err = 0;
unmap:
@ -310,8 +307,6 @@ static void ssb_pcicore_init_hostmode(struct ssb_pcicore *pc)
udelay(150);
val |= SSB_PCICORE_CTL_RST; /* Deassert RST# */
pcicore_write32(pc, SSB_PCICORE_CTL, val);
val = SSB_PCICORE_ARBCTL_INTERN;
pcicore_write32(pc, SSB_PCICORE_ARBCTL, val);
udelay(1);
//TODO cardbus mode
@ -341,7 +336,6 @@ static void ssb_pcicore_init_hostmode(struct ssb_pcicore *pc)
* The following needs change, if we want to port hostmode
* to non-MIPS platform. */
set_io_port_base((unsigned long)ioremap_nocache(SSB_PCI_MEM, 0x04000000));
mdelay(300);
register_pci_controller(&ssb_pcicore_controller);
}

15
target/linux/generic-2.6/patches-2.6.23/310-ssb_pcicore_fixes.patch
View file

@ -1,8 +1,8 @@
Index: linux-2.6.23-rc6/drivers/ssb/driver_pcicore.c
Index: linux-2.6.23/drivers/ssb/driver_pcicore.c
===================================================================
--- linux-2.6.23-rc6.orig/drivers/ssb/driver_pcicore.c 2007-09-21 16:23:52.000000000 +0800
+++ linux-2.6.23-rc6/drivers/ssb/driver_pcicore.c 2007-09-21 16:24:08.000000000 +0800
@@ -93,6 +93,9 @@
--- linux-2.6.23.orig/drivers/ssb/driver_pcicore.c 2007-10-13 04:20:23.235499369 +0200
+++ linux-2.6.23/drivers/ssb/driver_pcicore.c 2007-10-13 04:21:28.895241103 +0200
@@ -93,10 +93,13 @@
/* Enable PCI bridge BAR1 prefetch and burst */
pci_write_config_dword(dev, SSB_BAR1_CONTROL, 3);
@ -12,6 +12,11 @@ Index: linux-2.6.23-rc6/drivers/ssb/driver_pcicore.c
}
DECLARE_PCI_FIXUP_EARLY(PCI_ANY_ID, PCI_ANY_ID, ssb_fixup_pcibridge);
-int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{
return ssb_mips_irq(extpci_core->dev) + 2;
}
@@ -110,7 +113,7 @@
if (unlikely(pc->cardbusmode && dev > 1))
@ -35,7 +40,7 @@ Index: linux-2.6.23-rc6/drivers/ssb/driver_pcicore.c
val |= SSB_PCICORE_CTL_RST; /* Deassert RST# */
pcicore_write32(pc, SSB_PCICORE_CTL, val);
+ val = SSB_PCICORE_ARBCTL_INTERN;
+ pcicore_write32(pc, SSB_PCICORE_ARBCTL, val);
+ pcicore_write32(pc, SSB_PCICORE_ARBCTL, val);
udelay(1);
//TODO cardbus mode