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uboot-sunxi: dts: Update orange Pi R1 integration

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This syncs the Orange Pi R1 device tree files with the one from the
upstream kernel and also uses the default configuration from the Orange
Pi Zero.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit is contained in:
Hauke Mehrtens 2018-01-02 00:37:26 +01:00
parent 7a6de6d77a
commit c971b4eeea
2 changed files with 76 additions and 149 deletions
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48
package/boot/uboot-sunxi/patches/301-sunxi-add-orangepi-R1-defconfig.patch
View file

@ -1,48 +0,0 @@
From 231201c71b902b5999ed9b143f2a54674cfae88a Mon Sep 17 00:00:00 2001
From: Hauke Mehrtens <hauke@hauke-m.de>
Date: Tue, 26 Sep 2017 22:17:33 +0200
Subject: sunxi: add orangepi R1 defconfig
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
---
board/sunxi/MAINTAINERS | 5 +++++
configs/orangepi_r1_defconfig | 19 +++++++++++++++++++
2 files changed, 24 insertions(+)
create mode 100644 configs/orangepi_r1_defconfig
--- a/board/sunxi/MAINTAINERS
+++ b/board/sunxi/MAINTAINERS
@@ -302,6 +302,11 @@ M: Jagan Teki <jagan@amarulasolutions.co
S: Maintained
F: configs/orangepi_prime_defconfig
+ORANGEPI R1 BOARD
+M: Hauke Mehrtens <hauke@hauke-m.de>
+S: Maintained
+F: configs/orangepi_r1_defconfig
+
PINE64 BOARDS
M: Andre Przywara <andre.przywara@arm.com>
S: Maintained
--- /dev/null
+++ b/configs/orangepi_r1_defconfig
@@ -0,0 +1,19 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_MACH_SUN8I_H3=y
+CONFIG_DRAM_CLK=624
+CONFIG_DRAM_ZQ=3881979
+CONFIG_DRAM_ODT_EN=y
+# CONFIG_VIDEO_DE2 is not set
+CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-orangepi-r1"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_CONSOLE_MUX=y
+CONFIG_SPL=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_SPL_SPI_SUNXI=y
+CONFIG_SUN8I_EMAC=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

175
package/boot/uboot-sunxi/patches/300-sunxi-add-device-tree-for-Orange-Pi-R1-board.patch → package/boot/uboot-sunxi/patches/320-sunxi-Add-support-for-Orange-Pi-R1.patch
View file

@ -1,14 +1,20 @@
From 1f92596cc520f760589289059a5aa739366dd19c Mon Sep 17 00:00:00 2001
From 068fb0d5728c5ec93cb961718d59e7c718886edd Mon Sep 17 00:00:00 2001
From: Hauke Mehrtens <hauke@hauke-m.de>
Date: Tue, 26 Sep 2017 22:16:59 +0200
Subject: sunxi: add device tree for Orange Pi R1 board
Subject: sunxi: Add support for Orange Pi R1
The device tree files are also submitted for inclusion into the Linux
kernel.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/sun8i-h2-plus-orangepi-r1.dts | 157 +++++++++++++++++++++++++++++
2 files changed, 158 insertions(+)
arch/arm/dts/sun8i-h2-plus-orangepi-r1.dts | 77 ++++++++++++++++++++++++++++++
board/sunxi/MAINTAINERS | 5 ++
configs/orangepi_r1_defconfig | 26 ++++++++++
4 files changed, 109 insertions(+)
create mode 100644 arch/arm/dts/sun8i-h2-plus-orangepi-r1.dts
create mode 100644 configs/orangepi_r1_defconfig
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@ -22,15 +28,9 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
sun8i-h3-orangepi-2.dtb \
--- /dev/null
+++ b/arch/arm/dts/sun8i-h2-plus-orangepi-r1.dts
@@ -0,0 +1,157 @@
@@ -0,0 +1,91 @@
+/*
+ * Copyright (C) 2017 Hauke Mehrtens <hauke@hauke-m.de>
+ *
+ * Based on sun8i-h2-plus-orangepi-zero.dts, which is:
+ * Copyright (C) 2016 Icenowy Zheng <icenowy@aosc.xyz>
+ *
+ * Based on sun8i-h3-orangepi-one.dts, which is:
+ * Copyright (C) 2016 Hans de Goede <hdegoede@redhat.com>
+ * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.xyz>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
@ -71,112 +71,87 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun8i-h3.dtsi"
+#include "sunxi-common-regulators.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+/* Orange Pi R1 is based on Orange Pi Zero design */
+#include "sun8i-h2-plus-orangepi-zero.dts"
+
+/ {
+ model = "Xunlong Orange Pi R1";
+ compatible = "xunlong,orangepi-r1", "allwinner,sun8i-h2-plus";
+
+ aliases {
+ serial0 = &uart0;
+ /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
+ ethernet1 = &xr819;
+ };
+ /delete-node/ reg_vcc_wifi;
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ pwr_led {
+ label = "orangepi:green:pwr";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+
+ status_led {
+ label = "orangepi:red:status";
+ gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ reg_vcc_wifi: reg_vcc_wifi {
+ /*
+ * Ths pin of this regulator is the same with the Wi-Fi extra
+ * regulator on the original Zero. However it's used for USB
+ * Ethernet rather than the Wi-Fi now.
+ */
+ reg_vcc_usb_eth: reg-vcc-usb-ethernet {
+ compatible = "regulator-fixed";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-name = "vcc-usb-ethernet";
+ enable-active-high;
+ gpio = <&pio 0 20 GPIO_ACTIVE_HIGH>;
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&emac {
+ phy = <&phy1>;
+ phy-mode = "mii";
+ allwinner,use-internal-phy;
+ allwinner,leds-active-low;
+ status = "okay";
+ phy1: ethernet-phy@1 {
+ reg = <1>;
+ };
+};
+
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins_a>;
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
+ cd-inverted;
+ status = "okay";
+};
+
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins_a>;
+ vmmc-supply = <&reg_vcc_wifi>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ /*
+ * Explicitly define the sdio device, so that we can add an ethernet
+ * alias for it (which e.g. makes u-boot set a mac-address).
+ */
+ xr819: sdio_wifi@1 {
+ reg = <1>;
+ aliases {
+ ethernet1 = &rtl8189etv;
+ };
+};
+
+&ohci1 {
+ status = "okay";
+ /*
+ * RTL8152B USB-Ethernet adapter is connected to USB1,
+ * and it's a USB 2.0 device. So the OHCI1 controller
+ * can be left disabled.
+ */
+ status = "disabled";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ status = "okay";
+&mmc1 {
+ vmmc-supply = <&reg_vcc3v3>;
+ vqmmc-supply = <&reg_vcc3v3>;
+
+ rtl8189etv: sdio_wifi@1 {
+ reg = <1>;
+ };
+};
+
+&usbphy {
+ /* USB VBUS is always on */
+ status = "okay";
+ usb1_vbus-supply = <&reg_vcc_usb_eth>;
+};
--- a/board/sunxi/MAINTAINERS
+++ b/board/sunxi/MAINTAINERS
@@ -302,6 +302,11 @@ M: Jagan Teki <jagan@amarulasolutions.co
S: Maintained
F: configs/orangepi_prime_defconfig
+ORANGEPI R1 BOARD
+M: Hauke Mehrtens <hauke@hauke-m.de>
+S: Maintained
+F: configs/orangepi_r1_defconfig
+
PINE64 BOARDS
M: Andre Przywara <andre.przywara@arm.com>
S: Maintained
--- /dev/null
+++ b/configs/orangepi_r1_defconfig
@@ -0,0 +1,18 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_MACH_SUN8I_H3=y
+CONFIG_DRAM_CLK=624
+CONFIG_DRAM_ZQ=3881979
+CONFIG_DRAM_ODT_EN=y
+# CONFIG_VIDEO_DE2 is not set
+CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-orangepi-r1"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_CONSOLE_MUX=y
+CONFIG_SPL=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_SPL_SPI_SUNXI=y
+CONFIG_SUN8I_EMAC=y
+CONFIG_USB_EHCI_HCD=y