ath79: ar724x: fix pll settings
Add the syscon compatible, otherwise used functions like syscon_regmap_lookup_by_phandle() will return an error and setting the ethernet pll data wont work at all. Fix the pll register width. Writing to registers out of the range via syscon isn't possible and returns an error. On ar7242 the last pll register - Current Audio Modulation Logic Output - is at 0x1805003c. Signed-off-by: Mathias Kresin <dev@kresin.me>
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@ -65,9 +65,8 @@
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pll: pll-controller@18050000 {
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compatible = "qca,ar7240-pll",
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"qca,ar7240-pll";
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reg = <0x18050000 0x20>;
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compatible = "qca,ar7240-pll", "syscon";
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reg = <0x18050000 0x3c>;
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clock-names = "ref";
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/* The board must provides the ref clock */
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