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nuke the magicbox target and incorporate a rewritten port into ppc40x - note: no CF driver for now

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SVN-Revision: 13358
This commit is contained in:
Imre Kaloz 2008-11-26 10:06:34 +00:00
parent 8375b83015
commit b359ab764f
14 changed files with 1035 additions and 979 deletions
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19
target/linux/magicbox/Makefile
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@ -1,19 +0,0 @@
#
# Copyright (C) 2006-2008 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
ARCH:=powerpc
BOARD:=magicbox
BOARDNAME:=Magicbox
FEATURES:=squashfs pci
LINUX_VERSION:=2.6.26.8
LINUX_KARCH:=ppc
include $(INCLUDE_DIR)/target.mk
$(eval $(call BuildTarget))

187
target/linux/magicbox/config-default
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@ -1,187 +0,0 @@
CONFIG_405EP=y
CONFIG_40x=y
# CONFIG_44x is not set
CONFIG_4xx=y
# CONFIG_6xx is not set
# CONFIG_8139TOO is not set
# CONFIG_8xx is not set
# CONFIG_ADVANCED_OPTIONS is not set
# CONFIG_AGP is not set
CONFIG_ARCH_HAS_ILOG2_U32=y
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_ARCH_MAY_HAVE_PC_FDC=y
CONFIG_ARCH_POPULATES_NODE_MAP=y
# CONFIG_ARCH_SUPPORTS_MSI is not set
CONFIG_BASE_SMALL=0
CONFIG_BIOS_FIXUP=y
CONFIG_BITREVERSE=y
CONFIG_BLK_DEV_IDE=m
CONFIG_BLK_DEV_IDEDISK=m
# CONFIG_BLK_DEV_IDEDMA is not set
CONFIG_BLK_DEV_MAGICBOX_IDE=m
# CONFIG_BOOKE_WDT is not set
CONFIG_BOOT_LOAD=0x00400000
CONFIG_BOUNCE=y
# CONFIG_BT is not set
# CONFIG_BUBINGA is not set
CONFIG_CLASSIC_RCU=y
CONFIG_CMDLINE="root=/dev/mtdblock1 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200 init=/etc/preinit"
CONFIG_CMDLINE_BOOL=y
CONFIG_CONSISTENT_SIZE=0x00200000
CONFIG_CONSISTENT_START=0xff100000
# CONFIG_CPCI405 is not set
# CONFIG_CPU_FREQ is not set
# CONFIG_DEBUG_BUGVERBOSE is not set
CONFIG_DEVPORT=y
# CONFIG_DMADEVICES is not set
# CONFIG_EDAC is not set
# CONFIG_EP405 is not set
CONFIG_FS_POSIX_ACL=y
CONFIG_GENERIC_BUG=y
# CONFIG_GENERIC_FIND_FIRST_BIT is not set
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_NVRAM=y
# CONFIG_GEN_RTC is not set
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
# CONFIG_HAVE_DMA_ATTRS is not set
CONFIG_HAVE_IDE=y
CONFIG_HAVE_KPROBES=y
# CONFIG_HAVE_KRETPROBES is not set
CONFIG_HAVE_OPROFILE=y
# CONFIG_HIGHMEM is not set
CONFIG_HIGHMEM_START=0xfe000000
CONFIG_HW_RANDOM=y
# CONFIG_I2C is not set
CONFIG_IBM_EMAC=y
# CONFIG_IBM_EMAC_DEBUG is not set
# CONFIG_IBM_EMAC_PHY_RX_CLK_FIX is not set
CONFIG_IBM_EMAC_POLL_WEIGHT=32
CONFIG_IBM_EMAC_RXB=64
CONFIG_IBM_EMAC_RX_COPY_THRESHOLD=256
CONFIG_IBM_EMAC_RX_SKB_HEADROOM=0
CONFIG_IBM_EMAC_TXB=8
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
# CONFIG_IBM_NEW_EMAC_RGMII is not set
# CONFIG_IBM_NEW_EMAC_TAH is not set
# CONFIG_IBM_NEW_EMAC_ZMII is not set
CONFIG_IBM_OCP=y
CONFIG_IDE=m
CONFIG_IDE_GENERIC=m
# CONFIG_IDE_PROC_FS is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IPV6_NDISC_NODETYPE=y
CONFIG_ISA_DMA_API=y
# CONFIG_IWLWIFI_LEDS is not set
CONFIG_KERNEL_START=0xc0000000
# CONFIG_LEDS_ALIX is not set
CONFIG_LOWMEM_SIZE=0x30000000
# CONFIG_MACINTOSH_DRIVERS is not set
CONFIG_MAGICBOX=y
# CONFIG_MATH_EMULATION is not set
CONFIG_MTD=y
# CONFIG_MTD_ABSENT is not set
CONFIG_MTD_BLKDEVS=y
CONFIG_MTD_BLOCK=y
# CONFIG_MTD_BLOCK2MTD is not set
CONFIG_MTD_CFI=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_AMDSTD=y
# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
# CONFIG_MTD_CFI_GEOMETRY is not set
CONFIG_MTD_CFI_I1=y
CONFIG_MTD_CFI_I2=y
# CONFIG_MTD_CFI_I4 is not set
# CONFIG_MTD_CFI_I8 is not set
# CONFIG_MTD_CFI_INTELEXT is not set
# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
CONFIG_MTD_CFI_NOSWAP=y
# CONFIG_MTD_CFI_STAA is not set
CONFIG_MTD_CFI_UTIL=y
CONFIG_MTD_CHAR=y
# CONFIG_MTD_CMDLINE_PARTS is not set
CONFIG_MTD_COMPLEX_MAPPINGS=y
# CONFIG_MTD_CONCAT is not set
# CONFIG_MTD_DEBUG is not set
# CONFIG_MTD_DOC2000 is not set
# CONFIG_MTD_DOC2001 is not set
# CONFIG_MTD_DOC2001PLUS is not set
CONFIG_MTD_GEN_PROBE=y
# CONFIG_MTD_JEDECPROBE is not set
CONFIG_MTD_MAP_BANK_WIDTH_1=y
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
CONFIG_MTD_MAP_BANK_WIDTH_2=y
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
CONFIG_MTD_MAP_BANK_WIDTH_4=y
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
# CONFIG_MTD_MTDRAM is not set
# CONFIG_MTD_ONENAND is not set
# CONFIG_MTD_OTP is not set
CONFIG_MTD_PARTITIONS=y
# CONFIG_MTD_PCI is not set
# CONFIG_MTD_PHRAM is not set
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_PHYSMAP_BANKWIDTH=2
CONFIG_MTD_PHYSMAP_LEN=0
CONFIG_MTD_PHYSMAP_START=0xffc00000
# CONFIG_MTD_PLATRAM is not set
# CONFIG_MTD_PMC551 is not set
# CONFIG_MTD_RAM is not set
# CONFIG_MTD_REDBOOT_PARTS is not set
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_SLRAM is not set
# CONFIG_NATSEMI is not set
# CONFIG_NE2K_PCI is not set
# CONFIG_NETDEV_1000 is not set
# CONFIG_NET_VENDOR_3COM is not set
CONFIG_NOT_COHERENT_CACHE=y
# CONFIG_NVRAM is not set
# CONFIG_OCF_OCF is not set
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PCI=y
# CONFIG_PCIPCWATCHDOG is not set
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_SYSCALL=y
# CONFIG_PC_KEYBOARD is not set
CONFIG_PPC=y
CONFIG_PPC32=y
CONFIG_PPC4xx_DMA=y
CONFIG_PPC4xx_EDMA=y
CONFIG_PPC_DCR=y
CONFIG_PPC_DCR_NATIVE=y
CONFIG_PPC_GEN550=y
# CONFIG_PPC_I8259 is not set
CONFIG_PPC_INDIRECT_PCI=y
CONFIG_PPC_OCP=y
# CONFIG_R6040 is not set
# CONFIG_REDWOOD_5 is not set
# CONFIG_REDWOOD_6 is not set
CONFIG_RFKILL_LEDS=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
# CONFIG_SCHED_HRTICK is not set
CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
CONFIG_SCSI_WAIT_SCAN=m
# CONFIG_SERIAL_8250_EXTENDED is not set
# CONFIG_SERIAL_TEXT_DEBUG is not set
# CONFIG_SOFT_WATCHDOG is not set
# CONFIG_SOUND is not set
# CONFIG_SPARSEMEM_STATIC is not set
# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
CONFIG_SSB_POSSIBLE=y
# CONFIG_SYCAMORE is not set
CONFIG_SYSVIPC_SYSCTL=y
CONFIG_TASK_SIZE=0x80000000
CONFIG_UART0_TTYS0=y
# CONFIG_UART0_TTYS1 is not set
# CONFIG_VGASTATE is not set
# CONFIG_VIA_RHINE is not set
CONFIG_VIDEO_MEDIA=m
CONFIG_VIDEO_V4L2=m
CONFIG_VIDEO_V4L2_COMMON=m
# CONFIG_WALNUT is not set
CONFIG_WANT_EARLY_SERIAL=y
CONFIG_WORD_SIZE=32
# CONFIG_XILINX_ML300 is not set
# CONFIG_XILINX_ML403 is not set
# CONFIG_XILINX_SYSACE is not set

298
target/linux/magicbox/files/arch/ppc/platforms/4xx/magicbox.c
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@ -1,298 +0,0 @@
/*
* Support for IBM PPC 405EP-based MagicBox board
* Copyright (C) 2006 Karol Lewandowski
*
* Heavily based on bubinga.c
*
* Author: SAW (IBM), derived from walnut.c.
* Maintained by MontaVista Software <source@mvista.com>
*
* 2003 (c) MontaVista Softare Inc. This file is licensed under the
* terms of the GNU General Public License version 2. This program is
* licensed "as is" without any warranty of any kind, whether express
* or implied.
*/
#include <linux/init.h>
#include <linux/smp.h>
#include <linux/threads.h>
#include <linux/param.h>
#include <linux/string.h>
#include <linux/blkdev.h>
#include <linux/pci.h>
#include <linux/tty.h>
#include <linux/serial.h>
#include <linux/serial_core.h>
#include <linux/serial_8250.h>
#include <linux/platform_device.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <asm/system.h>
#include <asm/pci-bridge.h>
#include <asm/processor.h>
#include <asm/machdep.h>
#include <asm/page.h>
#include <asm/time.h>
#include <asm/io.h>
#include <asm/kgdb.h>
#include <asm/ocp.h>
#include <asm/ibm_ocp_pci.h>
#include <platforms/4xx/ibm405ep.h>
#undef DEBUG
#ifdef DEBUG
#define DBG(x...) printk(x)
#else
#define DBG(x...)
#endif
extern bd_t __res;
/* Some IRQs unique to the board
* Used by the generic 405 PCI setup functions in ppc4xx_pci.c
*/
int __init
ppc405_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
{
static char pci_irq_table[][4] =
/*
* PCI IDSEL/INTPIN->INTLINE
* A B C D
*/
{
{28, 28, 28, 28}, /* IDSEL 1 - PCI slot 1 */
{29, 29, 29, 29}, /* IDSEL 2 - PCI slot 2 */
{30, 30, 30, 30}, /* IDSEL 3 - PCI slot 3 */
{31, 31, 31, 31}, /* IDSEL 4 - PCI slot 4 */
};
const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4;
return PCI_IRQ_TABLE_LOOKUP;
};
/* The serial clock for the chip is an internal clock determined by
* different clock speeds/dividers.
* Calculate the proper input baud rate and setup the serial driver.
*/
static void __init
magicbox_early_serial_map(void)
{
u32 uart_div;
int uart_clock;
struct uart_port port;
/* Calculate the serial clock input frequency
*
* The base baud is the PLL OUTA (provided in the board info
* structure) divided by the external UART Divisor, divided
* by 16.
*/
uart_div = (mfdcr(DCRN_CPC0_UCR_BASE) & DCRN_CPC0_UCR_U0DIV);
uart_clock = __res.bi_procfreq / uart_div;
/* Setup serial port access */
memset(&port, 0, sizeof(port));
port.membase = (void*)ACTING_UART0_IO_BASE;
port.irq = ACTING_UART0_INT;
port.uartclk = uart_clock;
port.regshift = 0;
port.iotype = UPIO_MEM;
port.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
port.line = 0;
if (early_serial_setup(&port) != 0) {
printk("Early serial init of port 0 failed\n");
}
port.membase = (void*)ACTING_UART1_IO_BASE;
port.irq = ACTING_UART1_INT;
port.line = 1;
if (early_serial_setup(&port) != 0) {
printk("Early serial init of port 1 failed\n");
}
}
void __init
bios_fixup(struct pci_controller *hose, struct pcil0_regs *pcip)
{
#ifdef CONFIG_PCI
unsigned int bar_response, bar;
/*
* Expected PCI mapping:
*
* PLB addr PCI memory addr
* --------------------- ---------------------
* 0000'0000 - 7fff'ffff <--- 0000'0000 - 7fff'ffff
* 8000'0000 - Bfff'ffff ---> 8000'0000 - Bfff'ffff
*
* PLB addr PCI io addr
* --------------------- ---------------------
* e800'0000 - e800'ffff ---> 0000'0000 - 0001'0000
*
* The following code is simplified by assuming that the bootrom
* has been well behaved in following this mapping.
*/
#ifdef DEBUG
int i;
printk("ioremap PCLIO_BASE = 0x%x\n", pcip);
printk("PCI bridge regs before fixup \n");
for (i = 0; i <= 3; i++) {
printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].ma)));
printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].la)));
printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pcila)));
printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pciha)));
}
printk(" ptm1ms\t0x%x\n", in_le32(&(pcip->ptm1ms)));
printk(" ptm1la\t0x%x\n", in_le32(&(pcip->ptm1la)));
printk(" ptm2ms\t0x%x\n", in_le32(&(pcip->ptm2ms)));
printk(" ptm2la\t0x%x\n", in_le32(&(pcip->ptm2la)));
#endif
/* added for IBM boot rom version 1.15 bios bar changes -AK */
/* Disable region first */
out_le32((void *) &(pcip->pmm[0].ma), 0x00000000);
/* PLB starting addr, PCI: 0x80000000 */
out_le32((void *) &(pcip->pmm[0].la), 0x80000000);
/* PCI start addr, 0x80000000 */
out_le32((void *) &(pcip->pmm[0].pcila), PPC405_PCI_MEM_BASE);
/* 512MB range of PLB to PCI */
out_le32((void *) &(pcip->pmm[0].pciha), 0x00000000);
/* Enable no pre-fetch, enable region */
out_le32((void *) &(pcip->pmm[0].ma), ((0xffffffff -
(PPC405_PCI_UPPER_MEM -
PPC405_PCI_MEM_BASE)) | 0x01));
/* Disable region one */
out_le32((void *) &(pcip->pmm[1].ma), 0x00000000);
out_le32((void *) &(pcip->pmm[1].la), 0x00000000);
out_le32((void *) &(pcip->pmm[1].pcila), 0x00000000);
out_le32((void *) &(pcip->pmm[1].pciha), 0x00000000);
out_le32((void *) &(pcip->pmm[1].ma), 0x00000000);
out_le32((void *) &(pcip->ptm1ms), 0x00000001);
/* Disable region two */
out_le32((void *) &(pcip->pmm[2].ma), 0x00000000);
out_le32((void *) &(pcip->pmm[2].la), 0x00000000);
out_le32((void *) &(pcip->pmm[2].pcila), 0x00000000);
out_le32((void *) &(pcip->pmm[2].pciha), 0x00000000);
out_le32((void *) &(pcip->pmm[2].ma), 0x00000000);
out_le32((void *) &(pcip->ptm2ms), 0x00000000);
out_le32((void *) &(pcip->ptm2la), 0x00000000);
/* Zero config bars */
for (bar = PCI_BASE_ADDRESS_1; bar <= PCI_BASE_ADDRESS_2; bar += 4) {
early_write_config_dword(hose, hose->first_busno,
PCI_FUNC(hose->first_busno), bar,
0x00000000);
early_read_config_dword(hose, hose->first_busno,
PCI_FUNC(hose->first_busno), bar,
&bar_response);
DBG("BUS %d, device %d, Function %d bar 0x%8.8x is 0x%8.8x\n",
hose->first_busno, PCI_SLOT(hose->first_busno),
PCI_FUNC(hose->first_busno), bar, bar_response);
}
/* end workaround */
#ifdef DEBUG
printk("PCI bridge regs after fixup \n");
for (i = 0; i <= 3; i++) {
printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].ma)));
printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].la)));
printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pcila)));
printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pciha)));
}
printk(" ptm1ms\t0x%x\n", in_le32(&(pcip->ptm1ms)));
printk(" ptm1la\t0x%x\n", in_le32(&(pcip->ptm1la)));
printk(" ptm2ms\t0x%x\n", in_le32(&(pcip->ptm2ms)));
printk(" ptm2la\t0x%x\n", in_le32(&(pcip->ptm2la)));
#endif
#endif
}
static struct resource magicbox_flash_resource = {
.start = 0xffc00000,
.end = 0xffffffffULL,
.flags = IORESOURCE_MEM,
};
static struct mtd_partition magicbox_flash_parts[] = {
{
.name = "linux",
.offset = 0x0,
.size = 0x3c0000,
},
{
.name = "rootfs",
.offset = 0x100000,
.size = 0x2c0000,
}
};
static struct physmap_flash_data magicbox_flash_data = {
.width = 2,
.parts = magicbox_flash_parts,
.nr_parts = ARRAY_SIZE(magicbox_flash_parts),
};
static struct platform_device magicbox_flash_device = {
.name = "physmap-flash",
.id = 0,
.dev = {
.platform_data = &magicbox_flash_data,
},
.num_resources = 1,
.resource = &magicbox_flash_resource,
};
static int magicbox_setup_flash(void)
{
platform_device_register(&magicbox_flash_device);
return 0;
};
arch_initcall (magicbox_setup_flash);
void __init
magicbox_setup_arch(void)
{
ppc4xx_setup_arch();
ibm_ocp_set_emac(0, 1);
magicbox_early_serial_map();
/* Identify the system */
printk("MagicBox port (C) 2005 Karol Lewandowski <kl@jasmine.eu.org>\n");
}
void __init
magicbox_map_io(void)
{
ppc4xx_map_io();
}
void __init
platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7)
{
ppc4xx_init(r3, r4, r5, r6, r7);
ppc_md.setup_arch = magicbox_setup_arch;
ppc_md.setup_io_mappings = magicbox_map_io;
#ifdef CONFIG_KGDB
ppc_md.early_serial_map = bubinga_early_serial_map;
#endif
}

46
target/linux/magicbox/files/arch/ppc/platforms/4xx/magicbox.h
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@ -1,46 +0,0 @@
/*
* Support for IBM PPC 405EP-based MagicBox board
*
* Heavily based on bubinga.h
*
*
* Author: SAW (IBM), derived from walnut.h.
* Maintained by MontaVista Software <source@mvista.com>
*
* 2003 (c) MontaVista Softare Inc. This file is licensed under the
* terms of the GNU General Public License version 2. This program is
* licensed "as is" without any warranty of any kind, whether express
* or implied.
*/
#ifdef __KERNEL__
#ifndef __MAGICBOX_H__
#define __MAGICBOX_H__
#include <platforms/4xx/ibm405ep.h>
#include <asm/ppcboot.h>
/* Memory map for the "MagicBox" 405EP evaluation board -- generic 4xx. */
/* The UART clock is based off an internal clock -
* define BASE_BAUD based on the internal clock and divider(s).
* Since BASE_BAUD must be a constant, we will initialize it
* using clock/divider values which OpenBIOS initializes
* for typical configurations at various CPU speeds.
* The base baud is calculated as (FWDA / EXT UART DIV / 16)
*/
#define BASE_BAUD 0
/* Flash */
#define PPC40x_FPGA_BASE 0xF0300000
#define PPC40x_FPGA_REG_OFFS 1 /* offset to flash map reg */
#define PPC40x_FLASH_ONBD_N(x) (x & 0x02)
#define PPC40x_FLASH_SRAM_SEL(x) (x & 0x01)
#define PPC40x_FLASH_LOW 0xFFF00000
#define PPC40x_FLASH_HIGH 0xFFF80000
#define PPC40x_FLASH_SIZE 0x80000
#define PPC4xx_MACHINE_NAME "MagicBox"
#endif /* __MAGICBOX_H__ */
#endif /* __KERNEL__ */

301
target/linux/magicbox/files/drivers/ide/ppc/magicbox_ide.c
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@ -1,301 +0,0 @@
/*
* Driver for MagicBox 2.0 onboard CompactFlash adapter.
*
* Written by Wojtek Kaniewski <wojtekka@toxygen.net>
* Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
*
* GNU General Public License.
*/
#include <linux/version.h>
#include <linux/types.h>
#include <linux/mm.h>
#include <linux/interrupt.h>
#include <linux/blkdev.h>
#include <linux/hdreg.h>
#include <linux/ide.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
#define UIC0_PR 0xc4
#define UIC0_TR 0xc5
#define MAGICBOX_CF_IRQ 25
static u8 magicbox_ide_inb(unsigned long port)
{
return (u8) (readw((void __iomem *) port) >> 8) & 0xff;
}
static void magicbox_ide_outb(u8 value, unsigned long port)
{
writew(value << 8, (void __iomem *) port);
}
static void magicbox_ide_outbsync(ide_drive_t *drive, u8 value,
unsigned long port)
{
writew(value << 8, (void __iomem *) port);
}
static inline void magicbox_ide_insw(unsigned long port, void *addr, u32 count)
{
u16 *ptr;
for (ptr = addr; count--; ptr++)
*ptr = readw((void __iomem *) port);
}
static inline void magicbox_ide_insl(unsigned long port, void *addr, u32 count)
{
u32 *ptr;
for (ptr = addr; count--; ptr++)
*ptr = readl((void __iomem *) port);
}
static inline void magicbox_ide_outsw(unsigned long port, void *addr,
u32 count)
{
u16 *ptr;
for (ptr = addr; count--; ptr++)
writew(*ptr, (void __iomem *) port);
}
static inline void magicbox_ide_outsl(unsigned long port, void *addr,
u32 count)
{
u32 *ptr;
for (ptr = addr; count--; ptr++)
writel(*ptr, (void __iomem *) port);
}
static void magicbox_ide_tf_load(ide_drive_t *drive, ide_task_t *task)
{
struct ide_io_ports *io_ports = &drive->hwif->io_ports;
struct ide_taskfile *tf = &task->tf;
u8 HIHI = (task->tf_flags & IDE_TFLAG_LBA48) ? 0xE0 : 0xEF;
if (task->tf_flags & IDE_TFLAG_FLAGGED)
HIHI = 0xFF;
ide_set_irq(drive, 1);
if (task->tf_flags & IDE_TFLAG_OUT_DATA)
writel((tf->hob_data << 8) | tf->data,
(void __iomem *) io_ports->data_addr);
if (task->tf_flags & IDE_TFLAG_OUT_HOB_FEATURE)
magicbox_ide_outb(tf->hob_feature, io_ports->feature_addr);
if (task->tf_flags & IDE_TFLAG_OUT_HOB_NSECT)
magicbox_ide_outb(tf->hob_nsect, io_ports->nsect_addr);
if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAL)
magicbox_ide_outb(tf->hob_lbal, io_ports->lbal_addr);
if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAM)
magicbox_ide_outb(tf->hob_lbam, io_ports->lbam_addr);
if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAH)
magicbox_ide_outb(tf->hob_lbah, io_ports->lbah_addr);
if (task->tf_flags & IDE_TFLAG_OUT_FEATURE)
magicbox_ide_outb(tf->feature, io_ports->feature_addr);
if (task->tf_flags & IDE_TFLAG_OUT_NSECT)
magicbox_ide_outb(tf->nsect, io_ports->nsect_addr);
if (task->tf_flags & IDE_TFLAG_OUT_LBAL)
magicbox_ide_outb(tf->lbal, io_ports->lbal_addr);
if (task->tf_flags & IDE_TFLAG_OUT_LBAM)
magicbox_ide_outb(tf->lbam, io_ports->lbam_addr);
if (task->tf_flags & IDE_TFLAG_OUT_LBAH)
magicbox_ide_outb(tf->lbah, io_ports->lbah_addr);
if (task->tf_flags & IDE_TFLAG_OUT_DEVICE)
magicbox_ide_outb((tf->device & HIHI) | drive->select.all,
io_ports->device_addr);
}
static void magicbox_ide_tf_read(ide_drive_t *drive, ide_task_t *task)
{
struct ide_io_ports *io_ports = &drive->hwif->io_ports;
struct ide_taskfile *tf = &task->tf;
if (task->tf_flags & IDE_TFLAG_IN_DATA) {
u16 data = (u16) readl((void __iomem *) io_ports->data_addr);
tf->data = data & 0xff;
tf->hob_data = (data >> 8) & 0xff;
}
/* be sure we're looking at the low order bits */
magicbox_ide_outb(drive->ctl & ~0x80, io_ports->ctl_addr);
if (task->tf_flags & IDE_TFLAG_IN_NSECT)
tf->nsect = magicbox_ide_inb(io_ports->nsect_addr);
if (task->tf_flags & IDE_TFLAG_IN_LBAL)
tf->lbal = magicbox_ide_inb(io_ports->lbal_addr);
if (task->tf_flags & IDE_TFLAG_IN_LBAM)
tf->lbam = magicbox_ide_inb(io_ports->lbam_addr);
if (task->tf_flags & IDE_TFLAG_IN_LBAH)
tf->lbah = magicbox_ide_inb(io_ports->lbah_addr);
if (task->tf_flags & IDE_TFLAG_IN_DEVICE)
tf->device = magicbox_ide_inb(io_ports->device_addr);
if (task->tf_flags & IDE_TFLAG_LBA48) {
magicbox_ide_outb(drive->ctl | 0x80, io_ports->ctl_addr);
if (task->tf_flags & IDE_TFLAG_IN_HOB_FEATURE)
tf->hob_feature = magicbox_ide_inb(io_ports->feature_addr);
if (task->tf_flags & IDE_TFLAG_IN_HOB_NSECT)
tf->hob_nsect = magicbox_ide_inb(io_ports->nsect_addr);
if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAL)
tf->hob_lbal = magicbox_ide_inb(io_ports->lbal_addr);
if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAM)
tf->hob_lbam = magicbox_ide_inb(io_ports->lbam_addr);
if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAH)
tf->hob_lbah = magicbox_ide_inb(io_ports->lbah_addr);
}
}
static void magicbox_ide_input_data(ide_drive_t *drive, struct request *rq,
void *buf, unsigned int len)
{
unsigned long port = drive->hwif->io_ports.data_addr;
len++;
if (drive->io_32bit) {
magicbox_ide_insl(port, buf, len / 4);
if ((len & 3) >= 2)
magicbox_ide_insw(port, (u8 *)buf + (len & ~3), 1);
} else
magicbox_ide_insw(port, buf, len / 2);
}
static void magicbox_ide_output_data(ide_drive_t *drive, struct request *rq,
void *buf, unsigned int len)
{
unsigned long port = drive->hwif->io_ports.data_addr;
len++;
if (drive->io_32bit) {
magicbox_ide_outsl(port, buf, len / 4);
if ((len & 3) >= 2)
magicbox_ide_outsw(port, (u8 *)buf + (len & ~3), 1);
} else
magicbox_ide_outsw(port, buf, len / 2);
}
static void __init magicbox_ide_setup_hw(hw_regs_t *hw, u16 __iomem *base,
u16 __iomem *ctrl, int irq)
{
unsigned long port = (unsigned long) base;
int i;
memset(hw, 0, sizeof(*hw));
for (i = 0; i <= 7; i++)
hw->io_ports_array[i] = port + i * 2;
/*
* the IDE control register is at ATA address 6,
* with CS1 active instead of CS0
*/
hw->io_ports.ctl_addr = (unsigned long)ctrl + (6 * 2);
hw->irq = irq;
hw->chipset = ide_generic;
hw->ack_intr = NULL;
}
static int __init magibox_ide_probe(void)
{
hw_regs_t hw;
ide_hwif_t *hwif;
u16 __iomem *base;
u16 __iomem *ctrl;
u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
int err;
/* Remap physical address space */
base = ioremap_nocache(0xff100000, 4096);
if (base == NULL) {
err = -EBUSY;
goto err_out;
}
ctrl = ioremap_nocache(0xff200000, 4096);
if (ctrl == NULL) {
err = -EBUSY;
goto err_unmap_base;
}
magicbox_ide_setup_hw(&hw, base, ctrl, MAGICBOX_CF_IRQ);
hwif = ide_find_port();
if (!hwif) {
err = -ENODEV;
goto err_unmap_ctrl;
}
ide_init_port_data(hwif, hwif->index);
ide_init_port_hw(hwif, &hw);
hwif->host_flags = IDE_HFLAG_MMIO;
hwif->tf_load = magicbox_ide_tf_load;
hwif->tf_read = magicbox_ide_tf_read;
hwif->input_data = magicbox_ide_input_data;
hwif->output_data = magicbox_ide_output_data;
hwif->drives[0].unmask = 1;
hwif->OUTB = magicbox_ide_outb;
hwif->OUTBSYNC = magicbox_ide_outbsync;
hwif->INB = magicbox_ide_inb;
printk(KERN_INFO "ide%d: Magicbox CF interface\n", hwif->index);
idx[0] = hwif->index;
ide_device_add(idx, NULL);
return 0;
err_unmap_ctrl:
iounmap(ctrl);
err_unmap_base:
iounmap(base);
err_out:
return err;
}
static int __init magicbox_ide_init(void)
{
/* Turn on PerWE instead of PCIsomething */
mtdcr(DCRN_CPC0_PCI_BASE,
mfdcr(DCRN_CPC0_PCI_BASE) | (0x80000000L >> 27));
/* PerCS1 (CF's CS0): base 0xff100000, 16-bit, rw */
mtdcr(DCRN_EBC_BASE, 1);
mtdcr(DCRN_EBC_BASE + 1, 0xff11a000);
mtdcr(DCRN_EBC_BASE, 0x11);
mtdcr(DCRN_EBC_BASE + 1, 0x080bd800);
/* PerCS2 (CF's CS1): base 0xff200000, 16-bit, rw */
mtdcr(DCRN_EBC_BASE, 2);
mtdcr(DCRN_EBC_BASE + 1, 0xff21a000);
mtdcr(DCRN_EBC_BASE, 0x12);
mtdcr(DCRN_EBC_BASE + 1, 0x080bd800);
/* Set interrupt to low-to-high-edge-triggered */
mtdcr(UIC0_TR, mfdcr(UIC0_TR) & ~(0x80000000L >> MAGICBOX_CF_IRQ));
mtdcr(UIC0_PR, mfdcr(UIC0_PR) | (0x80000000L >> MAGICBOX_CF_IRQ));
return magibox_ide_probe();
}
module_init(magicbox_ide_init);
MODULE_LICENSE("GPL");

37
target/linux/magicbox/image/Makefile
View file

@ -1,37 +0,0 @@
#
# Copyright (C) 2006 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/image.mk
define Image/Prepare
cp $(LINUX_DIR)/arch/ppc/boot/images/uImage $(KDIR)/uImage
endef
define Image/BuildKernel
cp $(KDIR)/uImage $(BIN_DIR)/openwrt-$(BOARD)-uImage
endef
define Image/Build
$(call Image/Build/$(1),$(1))
endef
define Image/Build/jffs2-64k
( \
dd if=$(KDIR)/uImage bs=1024k conv=sync; \
dd if=$(KDIR)/root.$(1) bs=65536 conv=sync; \
) > $(BIN_DIR)/openwrt-$(BOARD)-$(1).img
endef
define Image/Build/squashfs
$(call prepare_generic_squashfs,$(KDIR)/root.squashfs)
( \
dd if=$(LINUX_DIR)/arch/ppc/boot/images/uImage bs=1024k conv=sync; \
dd if=$(KDIR)/root.$(1) bs=65536 conv=sync; \
) > $(BIN_DIR)/openwrt-$(BOARD)-$(1).img
endef
$(eval $(call BuildImage))

65
target/linux/magicbox/patches/001-magicbox_support.patch
View file

@ -1,65 +0,0 @@
--- a/arch/ppc/platforms/4xx/Kconfig
+++ b/arch/ppc/platforms/4xx/Kconfig
@@ -53,6 +53,12 @@ config WALNUT
help
This option enables support for the IBM PPC405GP evaluation board.
+config MAGICBOX
+ bool "MagicBox"
+ select WANT_EARLY_SERIAL
+ help
+ This option enables support for the IBM PPC405EP evaluation board.
+
config XILINX_ML300
bool "Xilinx-ML300"
select XILINX_VIRTEX_II_PRO
@@ -184,7 +190,7 @@ config BOOKE
config IBM_OCP
bool
- depends on ASH || BAMBOO || BUBINGA || CPCI405 || EBONY || EP405 || LUAN || YUCCA || OCOTEA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || TAISHAN || WALNUT
+ depends on ASH || BAMBOO || BUBINGA || CPCI405 || EBONY || EP405 || LUAN || YUCCA || OCOTEA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || TAISHAN || WALNUT || MAGICBOX
default y
config IBM_EMAC4
@@ -194,7 +200,7 @@ config IBM_EMAC4
config BIOS_FIXUP
bool
- depends on BUBINGA || EP405 || SYCAMORE || WALNUT || CPCI405
+ depends on BUBINGA || EP405 || SYCAMORE || WALNUT || CPCI405 || MAGICBOX
default y
# OAK doesn't exist but wanted to keep this around for any future 403GCX boards
@@ -205,7 +211,7 @@ config 403GCX
config 405EP
bool
- depends on BUBINGA
+ depends on BUBINGA || MAGICBOX
default y
config 405GP
--- a/arch/ppc/platforms/4xx/Makefile
+++ b/arch/ppc/platforms/4xx/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_REDWOOD_6) += redwood6.o
obj-$(CONFIG_SYCAMORE) += sycamore.o
obj-$(CONFIG_TAISHAN) += taishan.o
obj-$(CONFIG_WALNUT) += walnut.o
+obj-$(CONFIG_MAGICBOX) += magicbox.o
obj-$(CONFIG_XILINX_ML300) += xilinx_ml300.o
obj-$(CONFIG_XILINX_ML403) += xilinx_ml403.o
--- a/include/asm-ppc/ibm4xx.h
+++ b/include/asm-ppc/ibm4xx.h
@@ -19,6 +19,10 @@
#ifdef CONFIG_40x
+#if defined(CONFIG_MAGICBOX)
+#include <platforms/4xx/magicbox.h>
+#endif
+
#if defined(CONFIG_BUBINGA)
#include <platforms/4xx/bubinga.h>
#endif

24
target/linux/magicbox/patches/100-cf_slot.patch
View file

@ -1,24 +0,0 @@
--- a/drivers/ide/Kconfig
+++ b/drivers/ide/Kconfig
@@ -928,6 +928,14 @@ config BLK_DEV_MPC8xx_IDE
If unsure, say N.
+config BLK_DEV_MAGICBOX_IDE
+ tristate "MagicBox 2.0 CF IDE support"
+ depends on 4xx && IDE
+ help
+ This option provides support for IDE on MagicBox 2.0 boards.
+
+ If unsure, say N.
+
choice
prompt "Type of MPC8xx IDE interface"
depends on BLK_DEV_MPC8xx_IDE
--- a/drivers/ide/ppc/Makefile
+++ b/drivers/ide/ppc/Makefile
@@ -1,3 +1,4 @@
obj-$(CONFIG_BLK_DEV_IDE_PMAC) += pmac.o
obj-$(CONFIG_BLK_DEV_MPC8xx_IDE) += mpc8xx.o
+obj-$(CONFIG_BLK_DEV_MAGICBOX_IDE) += magicbox_ide.o

4
target/linux/ppc40x/config-default
View file

@ -5,6 +5,7 @@ CONFIG_4xx=y
CONFIG_4xx_SOC=y
# CONFIG_6xx is not set
# CONFIG_8139TOO is not set
# CONFIG_ACADIA is not set
# CONFIG_ADVANCED_OPTIONS is not set
# CONFIG_AGP is not set
CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
@ -36,6 +37,7 @@ CONFIG_DEVPORT=y
CONFIG_EARLY_PRINTK=y
# CONFIG_EDAC is not set
# CONFIG_EP405 is not set
CONFIG_EXTRA_TARGETS="uImage"
CONFIG_FORCE_MAX_ZONEORDER=11
# CONFIG_FSL_ULI1575 is not set
CONFIG_FS_POSIX_ACL=y
@ -94,6 +96,8 @@ CONFIG_LOWMEM_SIZE=0x30000000
CONFIG_LZO_COMPRESS=m
CONFIG_LZO_DECOMPRESS=m
# CONFIG_MACINTOSH_DRIVERS is not set
CONFIG_MAGICBOXV1=y
CONFIG_MAGICBOXV2=y
# CONFIG_MAKALU is not set
# CONFIG_MATH_EMULATION is not set
# CONFIG_MMIO_NVRAM is not set

20
target/linux/ppc40x/image/Makefile
View file

@ -27,7 +27,15 @@ define Image/Build/jffs2-128k
dd if=$(LINUX_DIR)/arch/powerpc/boot/uImage bs=1920k conv=sync; \
dd if=$(KDIR)/openwrt-kilauea.dtb bs=128k conv=sync; \
dd if=$(KDIR)/root.$(1) bs=128k conv=sync; \
) > $(BIN_DIR)/openwrt-$(BOARD)-jffs2.img
) > $(BIN_DIR)/openwrt-$(BOARD)-kilauea-jffs2.img
( \
dd if=$(LINUX_DIR)/arch/powerpc/boot/cuImage.magicboxv1 bs=1024k conv=sync; \
dd if=$(KDIR)/root.$(1) bs=128k conv=sync; \
) > $(BIN_DIR)/openwrt-$(BOARD)-magicboxv1-jffs2.img
( \
dd if=$(LINUX_DIR)/arch/powerpc/boot/cuImage.magicboxv2 bs=1024k conv=sync; \
dd if=$(KDIR)/root.$(1) bs=128k conv=sync; \
) > $(BIN_DIR)/openwrt-$(BOARD)-magicboxv2-jffs2.img
endef
define Image/Build/squashfs
@ -36,7 +44,15 @@ define Image/Build/squashfs
dd if=$(LINUX_DIR)/arch/powerpc/boot/uImage bs=1920k conv=sync; \
dd if=$(KDIR)/openwrt-kilauea.dtb bs=128k conv=sync; \
dd if=$(KDIR)/root.$(1) bs=128k conv=sync; \
) > $(BIN_DIR)/openwrt-$(BOARD)-$(1).img
) > $(BIN_DIR)/openwrt-$(BOARD)-kilauea-$(1).img
( \
dd if=$(LINUX_DIR)/arch/powerpc/boot/cuImage.magicboxv1 bs=1024k conv=sync; \
dd if=$(KDIR)/root.$(1) bs=64k conv=sync; \
) > $(BIN_DIR)/openwrt-$(BOARD)-magicboxv1-$(1).img
( \
dd if=$(LINUX_DIR)/arch/powerpc/boot/cuImage.magicboxv2 bs=1024k conv=sync; \
dd if=$(KDIR)/root.$(1) bs=64k conv=sync; \
) > $(BIN_DIR)/openwrt-$(BOARD)-magicboxv2-$(1).img
endef
$(eval $(call BuildImage))

142
target/linux/ppc40x/patches/003-ppc40x_simple_platform_support.patch Normal file
View file

@ -0,0 +1,142 @@
diff --git a/arch/powerpc/platforms/40x/Kconfig b/arch/powerpc/platforms/40x/Kconfig
index a9260e2..72ba3a7 100644
--- a/arch/powerpc/platforms/40x/Kconfig
+++ b/arch/powerpc/platforms/40x/Kconfig
@@ -14,6 +14,15 @@
# help
# This option enables support for the CPCI405 board.
+config ACADIA
+ bool "Acadia"
+ depends on 40x
+ default n
+ select PPC40x_SIMPLE
+ select 405EZ
+ help
+ This option enables support for the AMCC 405EZ Acadia evaluation board.
+
config EP405
bool "EP405/EP405PC"
depends on 40x
@@ -93,6 +102,13 @@ config XILINX_VIRTEX_GENERIC_BOARD
Most Virtex designs should use this unless it needs to do some
special configuration at board probe time.
+config PPC40x_SIMPLE
+ bool "Simple PowerPC 40x board support"
+ depends on 40x
+ default n
+ help
+ This option enables the simple PowerPC 40x platform support.
+
# 40x specific CPU modules, selected based on the board above.
config NP405H
bool
@@ -118,6 +134,12 @@ config 405EX
select IBM_NEW_EMAC_EMAC4
select IBM_NEW_EMAC_RGMII
+config 405EZ
+ bool
+ select IBM_NEW_EMAC_NO_FLOW_CTRL
+ select IBM_NEW_EMAC_MAL_CLR_ICINTSTAT
+ select IBM_NEW_EMAC_MAL_COMMON_ERR
+
config 405GPR
bool
diff --git a/arch/powerpc/platforms/40x/Makefile b/arch/powerpc/platforms/40x/Makefile
index 5533a5c..1d93273 100644
--- a/arch/powerpc/platforms/40x/Makefile
+++ b/arch/powerpc/platforms/40x/Makefile
@@ -3,3 +3,4 @@ obj-$(CONFIG_MAKALU) += makalu.o
obj-$(CONFIG_WALNUT) += walnut.o
obj-$(CONFIG_XILINX_VIRTEX_GENERIC_BOARD) += virtex.o
obj-$(CONFIG_EP405) += ep405.o
+obj-$(CONFIG_PPC40x_SIMPLE) += ppc40x_simple.o
diff --git a/arch/powerpc/platforms/40x/ppc40x_simple.c b/arch/powerpc/platforms/40x/ppc40x_simple.c
new file mode 100644
index 0000000..4498a86
--- /dev/null
+++ b/arch/powerpc/platforms/40x/ppc40x_simple.c
@@ -0,0 +1,80 @@
+/*
+ * Generic PowerPC 40x platform support
+ *
+ * Copyright 2008 IBM Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; version 2 of the License.
+ *
+ * This implements simple platform support for PowerPC 44x chips. This is
+ * mostly used for eval boards or other simple and "generic" 44x boards. If
+ * your board has custom functions or hardware, then you will likely want to
+ * implement your own board.c file to accommodate it.
+ */
+
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <asm/ppc4xx.h>
+#include <asm/prom.h>
+#include <asm/time.h>
+#include <asm/udbg.h>
+#include <asm/uic.h>
+
+#include <linux/init.h>
+#include <linux/of_platform.h>
+
+static __initdata struct of_device_id ppc40x_of_bus[] = {
+ { .compatible = "ibm,plb3", },
+ { .compatible = "ibm,plb4", },
+ { .compatible = "ibm,opb", },
+ { .compatible = "ibm,ebc", },
+ { .compatible = "simple-bus", },
+ {},
+};
+
+static int __init ppc40x_device_probe(void)
+{
+ of_platform_bus_probe(NULL, ppc40x_of_bus, NULL);
+
+ return 0;
+}
+machine_device_initcall(ppc40x_simple, ppc40x_device_probe);
+
+/* This is the list of boards that can be supported by this simple
+ * platform code. This does _not_ mean the boards are compatible,
+ * as they most certainly are not from a device tree perspective.
+ * However, their differences are handled by the device tree and the
+ * drivers and therefore they don't need custom board support files.
+ *
+ * Again, if your board needs to do things differently then create a
+ * board.c file for it rather than adding it to this list.
+ */
+static char *board[] __initdata = {
+ "amcc,acadia"
+};
+
+static int __init ppc40x_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+ int i = 0;
+
+ for (i = 0; i < ARRAY_SIZE(board); i++) {
+ if (of_flat_dt_is_compatible(root, board[i])) {
+ ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
+ return 1;
+ }
+ }
+
+ return 0;
+}
+
+define_machine(ppc40x_simple) {
+ .name = "PowerPC 40x Platform",
+ .probe = ppc40x_probe,
+ .progress = udbg_progress,
+ .init_IRQ = uic_init_tree,
+ .get_irq = uic_get_irq,
+ .restart = ppc4xx_reset_system,
+ .calibrate_decr = generic_calibrate_decr,
+};

202
target/linux/ppc40x/patches/004-acadia_cuboot.patch Normal file
View file

@ -0,0 +1,202 @@
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 6403275..5f4a59c 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -68,7 +68,8 @@ src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c cuboot-85xx.c holly.c
fixed-head.S ep88xc.c ep405.c cuboot-c2k.c \
cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \
cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
- virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c
+ virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \
+ cuboot-acadia.c
src-boot := $(src-wlib) $(src-plat) empty.c
src-boot := $(addprefix $(obj)/, $(src-boot))
@@ -211,6 +212,7 @@ image-$(CONFIG_DEFAULT_UIMAGE) += uImage
# Board ports in arch/powerpc/platform/40x/Kconfig
image-$(CONFIG_EP405) += dtbImage.ep405
image-$(CONFIG_WALNUT) += treeImage.walnut
+image-$(CONFIG_ACADIA) += cuImage.acadia
# Board ports in arch/powerpc/platform/44x/Kconfig
image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony
diff --git a/arch/powerpc/boot/cuboot-acadia.c b/arch/powerpc/boot/cuboot-acadia.c
new file mode 100644
index 0000000..0634aba
--- /dev/null
+++ b/arch/powerpc/boot/cuboot-acadia.c
@@ -0,0 +1,174 @@
+/*
+ * Old U-boot compatibility for Acadia
+ *
+ * Author: Josh Boyer <jwboyer@linux.vnet.ibm.com>
+ *
+ * Copyright 2008 IBM Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include "ops.h"
+#include "io.h"
+#include "dcr.h"
+#include "stdio.h"
+#include "4xx.h"
+#include "44x.h"
+#include "cuboot.h"
+
+#define TARGET_4xx
+#include "ppcboot.h"
+
+static bd_t bd;
+
+#define CPR_PERD0_SPIDV_MASK 0x000F0000 /* SPI Clock Divider */
+
+#define PLLC_SRC_MASK 0x20000000 /* PLL feedback source */
+
+#define PLLD_FBDV_MASK 0x1F000000 /* PLL feedback divider value */
+#define PLLD_FWDVA_MASK 0x000F0000 /* PLL forward divider A value */
+#define PLLD_FWDVB_MASK 0x00000700 /* PLL forward divider B value */
+
+#define PRIMAD_CPUDV_MASK 0x0F000000 /* CPU Clock Divisor Mask */
+#define PRIMAD_PLBDV_MASK 0x000F0000 /* PLB Clock Divisor Mask */
+#define PRIMAD_OPBDV_MASK 0x00000F00 /* OPB Clock Divisor Mask */
+#define PRIMAD_EBCDV_MASK 0x0000000F /* EBC Clock Divisor Mask */
+
+#define PERD0_PWMDV_MASK 0xFF000000 /* PWM Divider Mask */
+#define PERD0_SPIDV_MASK 0x000F0000 /* SPI Divider Mask */
+#define PERD0_U0DV_MASK 0x0000FF00 /* UART 0 Divider Mask */
+#define PERD0_U1DV_MASK 0x000000FF /* UART 1 Divider Mask */
+
+static void get_clocks(void)
+{
+ unsigned long sysclk, cpr_plld, cpr_pllc, cpr_primad, plloutb, i;
+ unsigned long pllFwdDiv, pllFwdDivB, pllFbkDiv, pllPlbDiv, pllExtBusDiv;
+ unsigned long pllOpbDiv, freqEBC, freqUART, freqOPB;
+ unsigned long div; /* total divisor udiv * bdiv */
+ unsigned long umin; /* minimum udiv */
+ unsigned short diff; /* smallest diff */
+ unsigned long udiv; /* best udiv */
+ unsigned short idiff; /* current diff */
+ unsigned short ibdiv; /* current bdiv */
+ unsigned long est; /* current estimate */
+ unsigned long baud;
+ void *np;
+
+ /* read the sysclk value from the CPLD */
+ sysclk = (in_8((unsigned char *)0x80000000) == 0xc) ? 66666666 : 33333000;
+
+ /*
+ * Read PLL Mode registers
+ */
+ cpr_plld = CPR0_READ(DCRN_CPR0_PLLD);
+ cpr_pllc = CPR0_READ(DCRN_CPR0_PLLC);
+
+ /*
+ * Determine forward divider A
+ */
+ pllFwdDiv = ((cpr_plld & PLLD_FWDVA_MASK) >> 16);
+
+ /*
+ * Determine forward divider B
+ */
+ pllFwdDivB = ((cpr_plld & PLLD_FWDVB_MASK) >> 8);
+ if (pllFwdDivB == 0)
+ pllFwdDivB = 8;
+
+ /*
+ * Determine FBK_DIV.
+ */
+ pllFbkDiv = ((cpr_plld & PLLD_FBDV_MASK) >> 24);
+ if (pllFbkDiv == 0)
+ pllFbkDiv = 256;
+
+ /*
+ * Read CPR_PRIMAD register
+ */
+ cpr_primad = CPR0_READ(DCRN_CPR0_PRIMAD);
+
+ /*
+ * Determine PLB_DIV.
+ */
+ pllPlbDiv = ((cpr_primad & PRIMAD_PLBDV_MASK) >> 16);
+ if (pllPlbDiv == 0)
+ pllPlbDiv = 16;
+
+ /*
+ * Determine EXTBUS_DIV.
+ */
+ pllExtBusDiv = (cpr_primad & PRIMAD_EBCDV_MASK);
+ if (pllExtBusDiv == 0)
+ pllExtBusDiv = 16;
+
+ /*
+ * Determine OPB_DIV.
+ */
+ pllOpbDiv = ((cpr_primad & PRIMAD_OPBDV_MASK) >> 8);
+ if (pllOpbDiv == 0)
+ pllOpbDiv = 16;
+
+ /* There is a bug in U-Boot that prevents us from using
+ * bd.bi_opbfreq because U-Boot doesn't populate it for
+ * 405EZ. We get to calculate it, yay!
+ */
+ freqOPB = (sysclk *pllFbkDiv) /pllOpbDiv;
+
+ freqEBC = (sysclk * pllFbkDiv) / pllExtBusDiv;
+
+ plloutb = ((sysclk * ((cpr_pllc & PLLC_SRC_MASK) ?
+ pllFwdDivB : pllFwdDiv) *
+ pllFbkDiv) / pllFwdDivB);
+
+ np = find_node_by_alias("serial0");
+ if (getprop(np, "current-speed", &baud, sizeof(baud)) != sizeof(baud))
+ fatal("no current-speed property\n\r");
+
+ udiv = 256; /* Assume lowest possible serial clk */
+ div = plloutb / (16 * baud); /* total divisor */
+ umin = (plloutb / freqOPB) << 1; /* 2 x OPB divisor */
+ diff = 256; /* highest possible */
+
+ /* i is the test udiv value -- start with the largest
+ * possible (256) to minimize serial clock and constrain
+ * search to umin.
+ */
+ for (i = 256; i > umin; i--) {
+ ibdiv = div / i;
+ est = i * ibdiv;
+ idiff = (est > div) ? (est-div) : (div-est);
+ if (idiff == 0) {
+ udiv = i;
+ break; /* can't do better */
+ } else if (idiff < diff) {
+ udiv = i; /* best so far */
+ diff = idiff; /* update lowest diff*/
+ }
+ }
+ freqUART = plloutb / udiv;
+
+ dt_fixup_cpu_clocks(bd.bi_procfreq, bd.bi_intfreq, bd.bi_plb_busfreq);
+ dt_fixup_clock("/plb/ebc", freqEBC);
+ dt_fixup_clock("/plb/opb", freqOPB);
+ dt_fixup_clock("/plb/opb/serial@ef600300", freqUART);
+ dt_fixup_clock("/plb/opb/serial@ef600400", freqUART);
+}
+
+static void acadia_fixups(void)
+{
+ dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
+ get_clocks();
+ dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr);
+}
+
+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+ unsigned long r6, unsigned long r7)
+{
+ CUBOOT_INIT();
+ platform_ops.fixups = acadia_fixups;
+ platform_ops.exit = ibm40x_dbcr_reset;
+ fdt_init(_dtb_start);
+ serial_console_init();
+}

318
target/linux/ppc40x/patches/005-magicboxv1.patch Normal file
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@ -0,0 +1,318 @@
diff -Nur a/arch/powerpc/boot/cuboot-magicboxv1.c b/arch/powerpc/boot/cuboot-magicboxv1.c
--- a/arch/powerpc/boot/cuboot-magicboxv1.c 1970-01-01 01:00:00.000000000 +0100
+++ b/arch/powerpc/boot/cuboot-magicboxv1.c 2008-11-23 20:13:57.000000000 +0100
@@ -0,0 +1,40 @@
+/*
+ * Old U-boot compatibility for Magicbox v1
+ *
+ * Author: Imre Kaloz <kaloz@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include "ops.h"
+#include "io.h"
+#include "dcr.h"
+#include "stdio.h"
+#include "4xx.h"
+#include "44x.h"
+#include "cuboot.h"
+
+#define TARGET_4xx
+#define TARGET_405EP
+#include "ppcboot.h"
+
+static bd_t bd;
+
+static void magicboxv1_fixups(void)
+{
+ ibm405ep_fixup_clocks(25000000);
+ ibm4xx_sdram_fixup_memsize();
+ dt_fixup_mac_addresses(&bd.bi_enetaddr);
+}
+
+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+ unsigned long r6, unsigned long r7)
+{
+ CUBOOT_INIT();
+ platform_ops.fixups = magicboxv1_fixups;
+ platform_ops.exit = ibm40x_dbcr_reset;
+ fdt_init(_dtb_start);
+ serial_console_init();
+}
diff -Nur a/arch/powerpc/boot/dts/magicboxv1.dts b/arch/powerpc/boot/dts/magicboxv1.dts
--- a/arch/powerpc/boot/dts/magicboxv1.dts 1970-01-01 01:00:00.000000000 +0100
+++ b/arch/powerpc/boot/dts/magicboxv1.dts 2008-11-26 09:14:46.000000000 +0100
@@ -0,0 +1,217 @@
+/*
+ * Device Tree Source for Magicbox v1
+ *
+ * Copyright 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ * Based on walnut.dts
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without
+ * any warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ model = "magicboxv1";
+ compatible = "magicboxv1";
+ dcr-parent = <&{/cpus/cpu@0}>;
+
+ aliases {
+ ethernet0 = &EMAC;
+ serial0 = &UART;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ model = "PowerPC,405EP";
+ reg = <0x00000000>;
+ clock-frequency = <0xbebc200>; /* Filled in by zImage */
+ timebase-frequency = <0>; /* Filled in by zImage */
+ i-cache-line-size = <20>;
+ d-cache-line-size = <20>;
+ i-cache-size = <4000>;
+ d-cache-size = <4000>;
+ dcr-controller;
+ dcr-access-method = "native";
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x00000000>; /* Filled in by zImage */
+ };
+
+ UIC0: interrupt-controller {
+ compatible = "ibm,uic";
+ interrupt-controller;
+ cell-index = <0>;
+ dcr-reg = <0x0c0 0x009>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #interrupt-cells = <2>;
+ };
+
+ plb {
+ compatible = "ibm,plb3";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ clock-frequency = <0>; /* Filled in by zImage */
+
+ SDRAM0: memory-controller {
+ compatible = "ibm,sdram-405ep";
+ dcr-reg = <0x010 0x002>;
+ };
+
+ MAL: mcmal {
+ compatible = "ibm,mcmal-405ep", "ibm,mcmal";
+ dcr-reg = <0x180 0x062>;
+ num-tx-chans = <4>;
+ num-rx-chans = <2>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <
+ 0xb 0x4 /* TXEOB */
+ 0xc 0x4 /* RXEOB */
+ 0xa 0x4 /* SERR */
+ 0xd 0x4 /* TXDE */
+ 0xe 0x4 /* RXDE */>;
+ };
+
+ POB0: opb {
+ compatible = "ibm,opb-405ep", "ibm,opb";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0xef600000 0xef600000 0x00a00000>;
+ dcr-reg = <0x0a0 0x005>;
+ clock-frequency = <0>; /* Filled in by zImage */
+
+ UART: serial@ef600300 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0xef600300 0x00000008>;
+ virtual-reg = <0xef600300>;
+ clock-frequency = <0>; /* Filled in by zImage */
+ current-speed = <115200>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <0x0 0x4>;
+ };
+
+ IIC: i2c@ef600500 {
+ compatible = "ibm,iic-405ep", "ibm,iic";
+ reg = <0xef600500 0x00000011>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <0x2 0x4>;
+ };
+
+ GPIO: gpio@ef600700 {
+ compatible = "ibm,gpio-405ep";
+ reg = <0xef600700 0x00000020>;
+ };
+
+ EMAC: ethernet@ef600800 {
+ linux,network-index = <0x0>;
+ device_type = "network";
+ compatible = "ibm,emac-405ep", "ibm,emac";
+ interrupt-parent = <&UIC0>;
+ interrupts = <
+ 0xf 0x4 /* Ethernet */
+ 0x9 0x4 /* Ethernet Wake Up */>;
+ local-mac-address = [000000000000]; /* Filled in by zImage */
+ reg = <0xef600800 0x00000070>;
+ mal-device = <&MAL>;
+ mal-tx-channel = <0>;
+ mal-rx-channel = <0>;
+ cell-index = <0>;
+ max-frame-size = <0x5dc>;
+ rx-fifo-size = <0x1000>;
+ tx-fifo-size = <0x800>;
+ phy-mode = "mii";
+ phy-map = <0x00000000>;
+ };
+
+ };
+
+ EBC0: ebc {
+ compatible = "ibm,ebc-405ep", "ibm,ebc";
+ dcr-reg = <0x012 0x002>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ /* The ranges property is supplied by the bootwrapper
+ * and is based on the firmware's configuration of the
+ * EBC bridge
+ */
+ clock-frequency = <0>; /* Filled in by zImage */
+
+ nor_flash@ffc00000 {
+ compatible = "cfi-flash";
+ bank-width = <2>;
+ reg = <0x00000000 0xffc00000 0x00400000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ partition@0 {
+ label = "linux";
+ reg = <0x0 0x3c0000>;
+ };
+ partition@100000 {
+ label = "rootfs";
+ reg = <0x100000 0x2c0000>;
+ };
+ partition@3c0000 {
+ label = "u-boot";
+ reg = <0x3c0000 0x30000>;
+ read-only;
+ };
+ };
+ };
+
+ PCI0: pci@ec000000 {
+ device_type = "pci";
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ compatible = "ibm,plb405ep-pci", "ibm,plb-pci";
+ primary;
+ reg = <0xeec00000 0x00000008 /* Config space access */
+ 0xeed80000 0x00000004 /* IACK */
+ 0xeed80000 0x00000004 /* Special cycle */
+ 0xef480000 0x00000040>; /* Internal registers */
+
+ /* Outbound ranges, one memory and one IO,
+ * later cannot be changed. Chip supports a second
+ * IO range but we don't use it for now
+ */
+ ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000
+ 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
+
+ /* Inbound 2GB range starting at 0 */
+ dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
+
+ /* Magicbox v1 has all 4 IRQ pins tied together per slot */
+ interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
+ interrupt-map = <
+ /* IDSEL 1 */
+ 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8
+
+ /* IDSEL 2 */
+ 0x1000 0x0 0x0 0x0 &UIC0 0x1d 0x8
+
+ /* IDSEL 3 */
+ 0x1800 0x0 0x0 0x0 &UIC0 0x1e 0x8
+
+ /* IDSEL 4 */
+ 0x2000 0x0 0x0 0x0 &UIC0 0x1f 0x8
+ >;
+ };
+ };
+
+ chosen {
+ linux,stdout-path = "/plb/opb/serial@ef600300";
+ };
+};
diff -Nur a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
--- a/arch/powerpc/boot/Makefile 2008-11-26 09:14:31.000000000 +0100
+++ b/arch/powerpc/boot/Makefile 2008-11-22 21:21:01.000000000 +0100
@@ -69,7 +69,7 @@
cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \
cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \
- cuboot-acadia.c
+ cuboot-acadia.c cuboot-magicboxv1.c
src-boot := $(src-wlib) $(src-plat) empty.c
src-boot := $(addprefix $(obj)/, $(src-boot))
@@ -213,6 +213,7 @@
image-$(CONFIG_EP405) += dtbImage.ep405
image-$(CONFIG_WALNUT) += treeImage.walnut
image-$(CONFIG_ACADIA) += cuImage.acadia
+image-$(CONFIG_MAGICBOXV1) += cuImage.magicboxv1
# Board ports in arch/powerpc/platform/44x/Kconfig
image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony
diff -Nur a/arch/powerpc/platforms/40x/Kconfig b/arch/powerpc/platforms/40x/Kconfig
--- a/arch/powerpc/platforms/40x/Kconfig 2008-11-26 09:14:31.000000000 +0100
+++ b/arch/powerpc/platforms/40x/Kconfig 2008-11-18 14:28:06.000000000 +0100
@@ -41,6 +41,16 @@
help
This option enables support for the AMCC PPC405EX evaluation board.
+config MAGICBOXV1
+ bool "Magicbox v1"
+ depends on 40x
+ default n
+ select PPC40x_SIMPLE
+ select 405EP
+ select PCI
+ help
+ This option enables support for the Magicbox v1 board.
+
config MAKALU
bool "Makalu"
depends on 40x
diff -Nur a/arch/powerpc/platforms/40x/ppc40x_simple.c b/arch/powerpc/platforms/40x/ppc40x_simple.c
--- a/arch/powerpc/platforms/40x/ppc40x_simple.c 2008-11-26 09:14:31.000000000 +0100
+++ b/arch/powerpc/platforms/40x/ppc40x_simple.c 2008-11-18 14:29:59.000000000 +0100
@@ -51,7 +51,8 @@
* board.c file for it rather than adding it to this list.
*/
static char *board[] __initdata = {
- "amcc,acadia"
+ "amcc,acadia",
+ "magicboxv1"
};
static int __init ppc40x_probe(void)

351
target/linux/ppc40x/patches/006-magicboxv2.patch Normal file
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@ -0,0 +1,351 @@
diff -Nur a/arch/powerpc/boot/cuboot-magicboxv2.c b/arch/powerpc/boot/cuboot-magicboxv2.c
--- a/arch/powerpc/boot/cuboot-magicboxv2.c 1970-01-01 01:00:00.000000000 +0100
+++ b/arch/powerpc/boot/cuboot-magicboxv2.c 2008-11-26 09:29:02.000000000 +0100
@@ -0,0 +1,40 @@
+/*
+ * Old U-boot compatibility for Magicbox v2
+ *
+ * Author: Imre Kaloz <kaloz@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include "ops.h"
+#include "io.h"
+#include "dcr.h"
+#include "stdio.h"
+#include "4xx.h"
+#include "44x.h"
+#include "cuboot.h"
+
+#define TARGET_4xx
+#define TARGET_405EP
+#include "ppcboot.h"
+
+static bd_t bd;
+
+static void magicboxv2_fixups(void)
+{
+ ibm405ep_fixup_clocks(25000000);
+ ibm4xx_sdram_fixup_memsize();
+ dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr);
+}
+
+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+ unsigned long r6, unsigned long r7)
+{
+ CUBOOT_INIT();
+ platform_ops.fixups = magicboxv2_fixups;
+ platform_ops.exit = ibm40x_dbcr_reset;
+ fdt_init(_dtb_start);
+ serial_console_init();
+}
diff -Nur a/arch/powerpc/boot/dts/magicboxv2.dts b/arch/powerpc/boot/dts/magicboxv2.dts
--- a/arch/powerpc/boot/dts/magicboxv2.dts 1970-01-01 01:00:00.000000000 +0100
+++ b/arch/powerpc/boot/dts/magicboxv2.dts 2008-11-26 09:28:10.000000000 +0100
@@ -0,0 +1,250 @@
+/*
+ * Device Tree Source for Magicbox v2
+ *
+ * Copyright 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ * Based on walnut.dts
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without
+ * any warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ model = "magicboxv2";
+ compatible = "magicboxv2";
+ dcr-parent = <&{/cpus/cpu@0}>;
+
+ aliases {
+ ethernet0 = &EMAC0;
+ ethernet1 = &EMAC1;
+ serial0 = &UART0;
+ serial1 = &UART1;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ model = "PowerPC,405EP";
+ reg = <0x00000000>;
+ clock-frequency = <0xbebc200>; /* Filled in by zImage */
+ timebase-frequency = <0>; /* Filled in by zImage */
+ i-cache-line-size = <20>;
+ d-cache-line-size = <20>;
+ i-cache-size = <4000>;
+ d-cache-size = <4000>;
+ dcr-controller;
+ dcr-access-method = "native";
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x00000000>; /* Filled in by zImage */
+ };
+
+ UIC0: interrupt-controller {
+ compatible = "ibm,uic";
+ interrupt-controller;
+ cell-index = <0>;
+ dcr-reg = <0x0c0 0x009>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #interrupt-cells = <2>;
+ };
+
+ plb {
+ compatible = "ibm,plb3";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ clock-frequency = <0>; /* Filled in by zImage */
+
+ SDRAM0: memory-controller {
+ compatible = "ibm,sdram-405ep";
+ dcr-reg = <0x010 0x002>;
+ };
+
+ MAL: mcmal {
+ compatible = "ibm,mcmal-405ep", "ibm,mcmal";
+ dcr-reg = <0x180 0x062>;
+ num-tx-chans = <4>;
+ num-rx-chans = <2>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <
+ 0xb 0x4 /* TXEOB */
+ 0xc 0x4 /* RXEOB */
+ 0xa 0x4 /* SERR */
+ 0xd 0x4 /* TXDE */
+ 0xe 0x4 /* RXDE */>;
+ };
+
+ POB0: opb {
+ compatible = "ibm,opb-405ep", "ibm,opb";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0xef600000 0xef600000 0x00a00000>;
+ dcr-reg = <0x0a0 0x005>;
+ clock-frequency = <0>; /* Filled in by zImage */
+
+ UART0: serial@ef600300 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0xef600300 0x00000008>;
+ virtual-reg = <0xef600300>;
+ clock-frequency = <0>; /* Filled in by zImage */
+ current-speed = <115200>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <0x0 0x4>;
+ };
+
+ UART1: serial@ef600400 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0xef600400 0x00000008>;
+ virtual-reg = <0xef600400>;
+ clock-frequency = <0>; /* Filled in by zImage */
+ current-speed = <115200>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <0x1 0x4>;
+ };
+
+ IIC: i2c@ef600500 {
+ compatible = "ibm,iic-405ep", "ibm,iic";
+ reg = <0xef600500 0x00000011>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <0x2 0x4>;
+ };
+
+ GPIO: gpio@ef600700 {
+ compatible = "ibm,gpio-405ep";
+ reg = <0xef600700 0x00000020>;
+ };
+
+ EMAC0: ethernet@ef600800 {
+ linux,network-index = <0x0>;
+ device_type = "network";
+ compatible = "ibm,emac-405ep", "ibm,emac";
+ interrupt-parent = <&UIC0>;
+ interrupts = <
+ 0xf 0x4 /* Ethernet */
+ 0x9 0x4 /* Ethernet Wake Up */>;
+ local-mac-address = [000000000000]; /* Filled in by zImage */
+ reg = <0xef600800 0x00000070>;
+ mal-device = <&MAL>;
+ mal-tx-channel = <0>;
+ mal-rx-channel = <0>;
+ cell-index = <0>;
+ max-frame-size = <0x5dc>;
+ rx-fifo-size = <0x1000>;
+ tx-fifo-size = <0x800>;
+ phy-mode = "mii";
+ phy-map = <0x00000000>;
+ };
+ EMAC1: ethernet@ef600900 {
+ linux,network-index = <0x1>;
+ device_type = "network";
+ compatible = "ibm,emac-405ep", "ibm,emac";
+ interrupt-parent = <&UIC0>;
+ interrupts = <
+ 0x11 0x4 /* Ethernet */
+ 0x09 0x4 /* Ethernet Wake Up */>;
+ local-mac-address = [000000000000]; /* Filled in by zImage */
+ reg = <0xef600900 0x00000070>;
+ mal-device = <&MAL>;
+ mal-tx-channel = <2>;
+ mal-rx-channel = <1>;
+ cell-index = <1>;
+ max-frame-size = <0x5dc>;
+ rx-fifo-size = <0x1000>;
+ tx-fifo-size = <0x800>;
+ mdio-device = <&EMAC0>;
+ phy-mode = "mii";
+ phy-map = <0x00000001>;
+ };
+
+ };
+
+ EBC0: ebc {
+ compatible = "ibm,ebc-405ep", "ibm,ebc";
+ dcr-reg = <0x012 0x002>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ /* The ranges property is supplied by the bootwrapper
+ * and is based on the firmware's configuration of the
+ * EBC bridge
+ */
+ clock-frequency = <0>; /* Filled in by zImage */
+
+ nor_flash@ffc00000 {
+ compatible = "cfi-flash";
+ bank-width = <2>;
+ reg = <0x00000000 0xffc00000 0x00400000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ partition@0 {
+ label = "linux";
+ reg = <0x0 0x3c0000>;
+ };
+ partition@100000 {
+ label = "rootfs";
+ reg = <0x100000 0x2c0000>;
+ };
+ partition@3c0000 {
+ label = "u-boot";
+ reg = <0x3c0000 0x30000>;
+ read-only;
+ };
+ };
+ };
+
+ PCI0: pci@ec000000 {
+ device_type = "pci";
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ compatible = "ibm,plb405ep-pci", "ibm,plb-pci";
+ primary;
+ reg = <0xeec00000 0x00000008 /* Config space access */
+ 0xeed80000 0x00000004 /* IACK */
+ 0xeed80000 0x00000004 /* Special cycle */
+ 0xef480000 0x00000040>; /* Internal registers */
+
+ /* Outbound ranges, one memory and one IO,
+ * later cannot be changed. Chip supports a second
+ * IO range but we don't use it for now
+ */
+ ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000
+ 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
+
+ /* Inbound 2GB range starting at 0 */
+ dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
+
+ interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
+ interrupt-map = <
+ /* IDSEL 1 */
+ 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8
+
+ /* IDSEL 2 */
+ 0x1000 0x0 0x0 0x0 &UIC0 0x1d 0x8
+
+ /* IDSEL 3 */
+ 0x1800 0x0 0x0 0x0 &UIC0 0x1e 0x8
+
+ /* IDSEL 4 */
+ 0x2000 0x0 0x0 0x0 &UIC0 0x1f 0x8
+ >;
+ };
+ };
+
+ chosen {
+ linux,stdout-path = "/plb/opb/serial@ef600300";
+ };
+};
diff -Nur a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
--- a/arch/powerpc/boot/Makefile 2008-11-26 09:15:15.000000000 +0100
+++ b/arch/powerpc/boot/Makefile 2008-11-26 09:17:01.000000000 +0100
@@ -69,7 +69,7 @@
cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \
cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \
- cuboot-acadia.c cuboot-magicboxv1.c
+ cuboot-acadia.c cuboot-magicboxv1.c cuboot-magicboxv2.c
src-boot := $(src-wlib) $(src-plat) empty.c
src-boot := $(addprefix $(obj)/, $(src-boot))
@@ -214,6 +214,7 @@
image-$(CONFIG_WALNUT) += treeImage.walnut
image-$(CONFIG_ACADIA) += cuImage.acadia
image-$(CONFIG_MAGICBOXV1) += cuImage.magicboxv1
+image-$(CONFIG_MAGICBOXV2) += cuImage.magicboxv2
# Board ports in arch/powerpc/platform/44x/Kconfig
image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony
diff -Nur a/arch/powerpc/platforms/40x/Kconfig b/arch/powerpc/platforms/40x/Kconfig
--- a/arch/powerpc/platforms/40x/Kconfig 2008-11-26 09:15:15.000000000 +0100
+++ b/arch/powerpc/platforms/40x/Kconfig 2008-11-26 09:16:08.000000000 +0100
@@ -51,6 +51,16 @@
help
This option enables support for the Magicbox v1 board.
+config MAGICBOXV2
+ bool "Magicbox v2"
+ depends on 40x
+ default n
+ select PPC40x_SIMPLE
+ select 405EP
+ select PCI
+ help
+ This option enables support for the Magicbox v2 board.
+
config MAKALU
bool "Makalu"
depends on 40x
diff -Nur a/arch/powerpc/platforms/40x/ppc40x_simple.c b/arch/powerpc/platforms/40x/ppc40x_simple.c
--- a/arch/powerpc/platforms/40x/ppc40x_simple.c 2008-11-26 09:15:15.000000000 +0100
+++ b/arch/powerpc/platforms/40x/ppc40x_simple.c 2008-11-26 09:15:46.000000000 +0100
@@ -52,7 +52,8 @@
*/
static char *board[] __initdata = {
"amcc,acadia",
- "magicboxv1"
+ "magicboxv1",
+ "magicboxv2",
};
static int __init ppc40x_probe(void)